IP Library Granted Patent US 7,570,930
Granted Patent B2
US 7,570,930 · App. 11/490,787 · Granted Aug 4, 2009

Amplifier arrangement, polar transmitter having the amplifier arrangement and method for amplifying signals

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Quick Facts
Patent No.
US 7,570,930
App. No.
11/490,787
Granted
Aug 4, 2009
Kind
B2
Abstract

An amplifier arrangement contains a first signal input for supplying a carrier signal, a second signal input for supplying an amplitude modulation word and an amplifier stage. The amplifier stage is connected to a reference potential connection and, by means of a control connection via a means for DC signal suppression, to the first signal input. A DC voltage converter having a first connection for supplying a potential is designed to convert the potential into a supply potential, which is variable over a period of time, on the basis of a control signal, and outputs the supply potential to the second connection of the amplifier stage. In addition, the amplifier arrangement comprises a digital/analog converter which is coupled to the control connection of the amplifier stage. The input of the converter is connected to the second signal input.

Claims (33)

1. An amplifier arrangement, comprising:

a first signal input configured to receive a phase-modulated carrier signal;

a second signal input configured to receive a digital amplitude modulation word;

an amplifier stage comprising a first connection connected to a reference potential connection, a second connection, and a control connection connected to the first signal input via a filter configured for DC signal suppression;

a DC voltage converter comprising a first connection configured to receive a potential, and a control connection configured to receive a control signal, wherein the DC voltage converter is configured to convert the potential into a supply potential, that is variable over a period of time, based on the control signal, and output the supply potential at its output, to the second connection of the amplifier stage; and

a digital/analog converter comprising an input connected to the second signal input, and an output coupled to the control connection of the amplifier stage, wherein the digital/analog converter is configured to convert the amplitude modulation word into an analog signal for controlling the amplifier stage.

2. The amplifier arrangement of claim 1 , wherein the amplifier stage comprises a setting input configured to receive a setting signal for setting the gain, and wherein the amplifier stage comprises at least two amplifier transistors that are arranged in a parallel manner and can be selectively switched based on the setting signal at the setting input.

3. The amplifier arrangement of claim 2 , wherein the amplifier stage further comprises a respective cascode transistor connected in series with the two amplifier transistors which are arranged in a parallel manner, wherein a control connection of each cascode transistor is connected to the setting input.

4. The amplifier arrangement of claim 1 , wherein the amplifier stage is configured as a class E amplifier.

5. The amplifier arrangement of claim 1 , further comprising a matching network connected to a node between the second connection of the amplifier stage and the DC voltage converter, and comprising an output forming a signal output for connection to a load.

6. The amplifier arrangement of claim 1 , wherein the output of the digital/analog converter is connected to a modulation input of the DC voltage converter, and wherein the DC voltage converter is configured to modulate the level of the supply potential in response to the analog signal supplied to the modulation input, and wherein the supply potential output of the DC voltage converter is coupled to the second connection and to the control connection of the amplifier stage.

7. The amplifier arrangement of claim 1 , further comprising a distortion unit connected between the supply potential output of the DC voltage converter and the control connection of the amplifier stage, wherein the distortion unit is configured to change the supply potential in response to coefficients which are supplied to the distortion unit.

8. The amplifier arrangement of claim 7 , wherein the distortion unit comprises a filter having a nonlinear transmission response.

9. The amplifier arrangement of claim 7 , wherein the distortion unit comprises a memory in which coefficients are stored.

10. The amplifier arrangement of claim 1 , wherein the digital/analog converter is configured to output a current signal derived from the supplied amplitude modulation word.

11. The amplifier arrangement of claim 1 , further comprising a current mirror transistor connected, by means of a first connection, to a current source configured to set an operating point and to the digital/analog converter to supply thereto a current signal derived from the supplied amplitude modulation word, wherein a control connection of the current mirror transistor is coupled to the control connection of the amplifier stage and to the first connection.

12. The amplifier arrangement of claim 11 , wherein the current mirror transistor has substantially the same transmission response as an amplifier transistor of the amplifier stage.

13. The amplifier arrangement of claim 11 , wherein the current mirror transistor corresponds to an amplifier transistor in the amplifier stage.

14. The amplifier arrangement of claim 11 , further comprising a correction circuit configured to output a correction current to the first connection of the current mirror transistor.

15. The amplifier arrangement of claim 1 , further comprising a voltage-current converter comprising an output coupled to the control connection of the amplifier stage, and an input coupled to the supply potential output of the DC voltage converter.

16. The amplifier arrangement of claim 1 , further comprising a low-pass filter connected downstream of the output of the digital/analog converter.

17. The amplifier arrangement of claim 1 , in combination with a phase locked loop comprising an input configured to receive a phase modulation word, wherein the phase locked loop is configured to change a frequency of a carrier signal in response to the phase modulation word, thereby providing a phase modulated carrier signal at an output thereat, and wherein the output of the phase locked loop is connected to the first signal input of the amplifier arrangement.

18. The amplifier arrangement of claim 17 , further comprising a converting device configured to convert a digital in-phase component and a digital quadrature component into the phase modulation word and an amplitude modulation word, wherein the converting device is connected to the amplifier arrangement and to the phase locked loop.

19. A method for amplifying signals, comprising:

providing a signal to be amplified;

converting a digital amplitude modulation word into an analog modulation signal;

generating a modulated supply potential from a potential in response to the analog modulation signal and based on a supplied control signal;

generating a setting signal from the modulated supply potential; and

amplifying the signal to be amplified by concurrently setting an operating point of an amplifier using the setting signal and supplying the modulated supply potential to the amplifier.

20. The method of claim 19 , wherein, before amplification, the setting signal is distorted based on supplied coefficients.

21. The method of claim 19 , wherein generating the setting signal comprises:

generating a current signal based on the analog modulation word; and

mirroring the current signal in order to control the amplifier.

Assignments (5)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 17, 2020
From: INTEL CORPORATION
To: APPLE INC.
Reel/Frame 053518/0586 →
CONFIRMATORY ASSIGNMENT EFFECTIVE AS OF JANUARY 1, 2018 Recorded Aug 12, 2020
From: INTEL DEUTSCHLAND GMBH
To: INTEL CORPORATION
Reel/Frame 053477/0001 →
CHANGE OF NAME Recorded Nov 6, 2015
From: INTEL MOBILE COMMUNICATIONS GMBH
To: INTEL DEUTSCHLAND GMBH
Reel/Frame 037057/0061 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 19, 2012
From: INTEL MOBILE COMMUNICATIONS TECHNOLOGY GMBH
To: INTEL MOBILE COMMUNICATIONS GMBH
Reel/Frame 027556/0709 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 18, 2012
From: INFINEON TECHNOLOGIES AG
To: INTEL MOBILE COMMUNICATIONS TECHNOLOGY GMBH
Reel/Frame 027548/0623 →