Current output circuit
View Patent ↗A capacitor having a capacitance value corresponding to the size of an output current generating transistor is connected between the gate terminal of the output current generating transistor and the input terminal of an inverter circuit.
1. A current output circuit comprising:
an output current generating transistor having a gate terminal to which a bias voltage is supplied;
an inverter circuit to which a switching signal is input;
a switching transistor having a gate terminal connected with an output terminal of the inverter circuit, a source terminal connected with a drain terminal of the output current generating transistor, and a drain terminal from which current is output; and
a capacitor connected between the gate terminal of the output current generating transistor and an input terminal of the inverter circuit.
2. The circuit of claim 1 , further comprising a cascode transistor having a gate terminal to which predetermined bias voltage is supplied, a source terminal connected with the drain terminal of the switching transistor, and a drain terminal from which current is output.
3. The circuit of claim 1 , further comprising a replica circuit including at least a replica of the output current generating transistor; and
a buffer circuit into which output voltage of the replica circuit is input,
wherein the output voltage of the replica circuit is supplied through the buffer circuit to a gate terminal of the replica output current generating transistor in the replica circuit so that gate voltage at that gate terminal becomes equal to the bias voltage.
4. The circuit of claim 3 , wherein the buffer circuit is a source follower.
5. The circuit of claim 1 , wherein capacitance value of the capacitor is set to a value corresponding to the amount of parasitic capacitance at the gate terminal of the output current generating transistor.
6. A digital-to-analog converter, comprising a unit current cell including the current output circuit of claim 1 .
7. The converter of claim 6 , wherein a plurality of said unit current cells are provided; and
the bias voltage is supplied as a common bias voltage to the gate terminals of the respective output current generating transistors in the unit current cells.
8. The converter of claim 6 , wherein a plurality of said unit current cells are provided; and
the bias voltage is supplied bit by bit as an individual bias voltage to each of the gate terminals of the respective output current generating transistors in the unit current cells.
9. A circuit for driving a current-to-light converter, the circuit comprising the digital-to-analog converter of claim 6 ,
wherein current is supplied from the digital-to-analog converter to the current-to-light converter.
10. A circuit for driving a current-to-light converter, the circuit comprising the current output circuit of claim 1 ,
wherein current is supplied from the current output circuit to the current-to-light converter.
11. A current output circuit comprising:
an output current generating transistor having a gate terminal to which bias voltage is supplied and a drain terminal from which current is output;
a switching transistor having a gate terminal into which a switching signal is input and a drain terminal connected with a source terminal of the output current generating transistor; and
a capacitor connected between the gate terminal of the output current generating transistor and the gate terminal of the switching transistor.
12. The circuit of claim 11 , further comprising a cascode transistor having a gate terminal to which predetermined bias voltage is supplied, a source terminal connected with the drain terminal of the output current generating transistor, and a drain terminal from which current is output.
13. The circuit of claim 11 , further comprising a replica circuit including at least a replica of the output current generating transistor; and
a buffer circuit into which output voltage of the replica circuit is input,
wherein the output voltage of the replica circuit is supplied through the buffer circuit to a gate terminal of the replica output current generating transistor in the replica circuit so that gate voltage at that gate terminal becomes equal to the bias voltage.
14. The circuit of claim 13 , wherein the buffer circuit is a source follower.
15. The circuit of claim 11 , wherein capacitance value of the capacitor is set to a value corresponding to the amount of parasitic capacitance at the gate terminal of the output current generating transistor.
16. A digital-to-analog converter, comprising a unit current cell including the current output circuit of claim 11 .
17. The converter of claim 16 , wherein a plurality of said unit current cells are provided; and
the bias voltage is supplied as a common bias voltage to the gate terminals of the respective output current generating transistors in the unit current cells.
18. The converter of claim 16 , wherein a plurality of said unit current cells are provided; and
the bias voltage is supplied bit by bit as an individual bias voltage to each of the gate terminals of the respective output current generating transistors in the unit current cells.
19. A circuit for driving a current-to-light converter, the circuit comprising the digital-to-analog converter of claim 16 ,
wherein current is supplied from the digital-to-analog converter to the current-to-light converter.
20. A circuit for driving a current-to-light converter, the circuit comprising the current output circuit of claim 11 ,
wherein current is supplied from the current output circuit to the current-to-light converter.