IP Library Granted Patent US 7,579,227
Granted Patent B2
US 7,579,227 · App. 11/491,260 · Granted Aug 25, 2009

Semiconductor device and method for fabricating the same

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Quick Facts
Patent No.
US 7,579,227
App. No.
11/491,260
Granted
Aug 25, 2009
Kind
B2
Abstract

A semiconductor device includes: a high dielectric constant gate insulating film formed on an active region in a substrate; a gate electrode formed on the high dielectric constant gate insulating film; and an insulating sidewall formed on each side surface of the gate electrode. The high dielectric constant gate insulating film is continuously formed so as to extend from under the gate electrode to under the insulating sidewall. At least part of the high dielectric constant gate insulating film located under the insulating sidewall has a smaller thickness than a thickness of part of the high dielectric constant gate insulating film located under the gate electrode.

Claims (34)

1. A semiconductor device comprising:

a high dielectric constant gate insulating film formed on an active region in a substrate;

a gate electrode formed on the high dielectric constant gate insulating film; and

an insulating sidewall formed on each side surface of the gate electrode,

wherein the high dielectric constant gate insulating film is continuously formed so as to extend from under the gate electrode to under the insulating sidewall,

at least part of the high dielectric constant gate insulating film located under the insulating sidewall has a smaller thickness than a thickness of part of the high dielectric constant gate insulating film located under the gate electrode,

the insulating sidewall includes a first insulating sidewall formed on a side surface of the gate electrode and a second insulating sidewall formed on the side surface of the gate electrode with the first insulating sidewall interposed therebetween,

the high dielectric constant gate insulating film is continuously formed so as to extend from under the gate electrode to under the first insulating sidewall, and

part of the high dielectric constant gate insulating film located under the first insulating sidewall has a smaller thickness than a thickness of part of the high dielectric constant gate insulating film located under the gate electrode.

2. The semiconductor device of claim 1 , wherein the high dielectric constant gate insulating film is formed so as not to be located under the second insulating sidewall.

3. The semiconductor device of claim 1 , wherein the high dielectric constant gate insulating film is continuously formed so as to extend to under the second insulating sidewall, and

part of the high dielectric constant gate insulating film located under the second insulating sidewall has the same thickness as a thickness of part of the high dielectric constant gate insulating film located under the first insulating sidewall.

4. The semiconductor device of claim 1 , wherein the high dielectric constant gate insulating film is continuously formed so as to extend from under the gate electrode to under the second insulating sidewall, and

part of the high dielectric constant gate insulating film located under the second insulating sidewall has a smaller thickness than a thickness of part of the high dielectric constant gate insulating film located under the first insulating sidewall.

5. A semiconductor device comprising:

a high dielectric constant gate insulating film formed on an active region in a substrate;

a gate electrode formed on the high dielectric constant gate insulating film; and

an insulating sidewall formed on each side surface of the gate electrode,

wherein the high dielectric constant gate insulating film is continuously formed so as to extend from under the gate electrode to under the insulating sidewall,

at least part of the high dielectric constant gate insulating film located under the insulating sidewall has a smaller thickness than a thickness of part of the high dielectric constant gate insulating film located under the gate electrode,

the insulating sidewall includes a first insulating sidewall formed on a side surface of the gate electrode and a second insulating sidewall formed on the side surface of the gate electrode with the first insulating sidewall interposed therebetween,

the high dielectric constant gate insulating film is continuously formed so as to extend from under the gate electrode to under the second insulating sidewall,

part of the high dielectric constant gate insulating film located under the first insulating sidewall has the same thickness as a thickness of part of the high dielectric constant gate insulating film located under the gate electrode, and

part of the high dielectric constant gate insulating film located under the second insulating sidewall has a smaller thickness than a thickness of part of the high dielectric constant gate insulating film located under the gate electrode.

6. The semiconductor device of claim 1 , wherein the high dielectric constant gate insulating film includes a notch at a side end portion.

7. The semiconductor device of claim 1 , further comprising a buffer insulating film between the substrate and the high dielectric constant gate insulating film.

8. The semiconductor device of claim 7 , wherein the buffer insulating film is a silicon oxide film or a silicon oxynitride film.

9. The semiconductor device of claim 1 , wherein the gate electrode is a fully silicided gate electrode of which an entire region has been silicided.

10. The semiconductor device of claim 5 , wherein the high dielectric constant gate insulating film includes a notch at a side end portion.

11. The semiconductor device of claim 5 , further comprising a buffer insulating film between the substrate and the high dielectric constant gate insulating film.

12. The semiconductor device of claim 11 , wherein the buffer insulating film is a silicon oxide film or a silicon oxynitride film.

13. The semiconductor device of claim 5 , wherein the gate electrode is a fully silicided gate electrode of which an entire region has been silicided.

14. The semiconductor device of claim 1 , wherein the high dielectric constant gate insulating film is formed of a Hf based oxide.

15. The semiconductor device of claim 5 , wherein the high dielectric constant gate insulating film is formed of a Hf based oxide.

Assignments (5)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 30, 2024
From: NUVOTON TECHNOLOGY CORPORATION JAPAN
To: ADVANCED INTEGRATED CIRCUIT PROCESS LLC
Reel/Frame 068118/0314 →
CHANGE OF NAME Recorded Jun 12, 2024
From: PANASONIC SEMICONDUCTOR SOLUTIONS CO., LTD.
To: NUVOTON TECHNOLOGY CORPORATION JAPAN
Reel/Frame 067711/0965 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 27, 2020
From: PANASONIC CORPORATION
To: PANASONIC SEMICONDUCTOR SOLUTIONS CO., LTD.
Reel/Frame 052755/0917 →
CHANGE OF NAME Recorded Nov 24, 2008
From: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
To: PANASONIC CORPORATION
Reel/Frame 021897/0671 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 5, 2006
From: HIRASE, JUNJI; SEBE, AKIO; KOTANI, NAOKI; OKAZAKI, GEN; AIDA, KAZUHIKO; TAKEOKA, SHINJI
To: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
Reel/Frame 018585/0417 →