Non-volatile semiconductor memory device and semiconductor disk device
View Patent ↗A non-volatile memory device is provided which includes a flash memory having a plurality of banks and a bank selection register which can take on states at least equal in number to the number of banks. The bank selection register outputs a signal to point to one of the banks based upon one of the states of the bank selection register. A controller is also provided having a plurality of data buffers corresponding, respectively, to the banks. In addition to word lines, bit lines and memory cells, each bank includes a data register to temporarily hold data to be written to the memory cells. The controller transmits data in the data buffer to the data register of the pointed to bank, while the flash memory writes data held in the data register to the memory cells of another one of the banks.
1. A non-volatile memory device comprising:
a first memory bank including a plurality of first memory cells and a first data register;
a second memory bank including a plurality of second memory cells and a second data register; and
a data buffer to temporarily hold data which is transmitted to the first or second memory bank and which is logically addressed, wherein a capacity of the data buffer is equal to or larger than a sum of capacities of the first and second data registers:
an address buffer coupled to the first and second memory banks,
wherein data transferred from the data buffer to the first data register is written into the plurality of first memory cells,
wherein data transferred from the data buffer to the second data register is written into the plurality of second,
wherein, while the plurality of first memory cells are written with data held in the first data register, the non-volatile memory device is adapted so that data inputted from external of the non-volatile memory device to the data buffer is transmitted to the second data register,
wherein, while the plurality of second memory cells are written with data held in the second data register, the non-volatile memory device is adapted so that data inputted from external of the non-volatile memory device to the data buffer is transmitted to the first data register, and
wherein the first memory bank is adapted to operate independently of the second memory bank.
2. A non-volatile memory device of according to claim 1 ,
wherein the first and second memory bank and the address buffer are formed on a first memory chip.
3. A non-volatile memory device according to claim 2 , further comprising:
a third memory bank including a plurality of third memory cells and a third data register; and
a fourth memory bank including a plurality of fourth memory cells and a fourth data register,
wherein the third and fourth memory banks are formed in a second memory chip, and
wherein data terminals of the first memory chip and data terminals of the second memory chip are coupled to each other.