IP Library Granted Patent US 7,482,876
Granted Patent B2
US 7,482,876 · App. 11/494,433 · Granted Jan 27, 2009

Amplifier circuit and method for amplifying a signal to be amplified

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Quick Facts
Patent No.
US 7,482,876
App. No.
11/494,433
Granted
Jan 27, 2009
Kind
B2
Abstract

An amplifier circuit includes a first series circuit connected between a supply voltage and a reference potential. The first series circuit includes a current source, a first tap and a first component configured as a diode. The amplifier circuit also includes a second series circuit connected between the supply voltage and the reference potential, and includes a controlled path between a first connection and a second connection of a first transistor and a second tap. The control connection of the first transistor is coupled to the first tap. The second tap is used to output a bias voltage. The amplifier circuit includes an amplifier stage coupled to the second tap for setting an operating point of the amplifier stage.

Claims (60)

1. An amplifier circuit, comprising

a first series circuit connected between a supply voltage connection and a reference potential connection, wherein the first series circuit comprises:

a current source;

a first tap connected between the current source and the reference potential connection;

a first component configured as a diode and a first impedance which are connected in series between the first tap and the reference potential connection;

a second series circuit connected between the supply voltage connection and the reference potential connection, and configured to mirror a first current which flows in the first series circuit with scaling to form a second current, wherein the second series circuit comprises:

a controlled path between a first connection and a second connection of a first transistor whose control connection is coupled to the first tap; and

a second impedance connected between the controlled path of the first transistor and the reference potential connection, having a first connection connected to the controlled path of the first transistor and a second connection connected to a second tap at which a bias voltage is tapped off, a ratio between the second current flowing in the second series circuit and the first current depends on the first and second impedances;

an amplifier stage coupled to the second tap, wherein the bias voltage thereat sets an operating point of the amplifier stage.

2. The amplifier circuit of claim 1 , wherein the amplifier stage further comprises a second component connected as a diode, and connected between the second tap and the reference potential connection.

3. The amplifier circuit of claim 2 , wherein the amplifier stage further comprises a second transistor having a controlled path extending between a first connection and a second connection of the second transistor, and connected between the supply voltage connection and the reference potential connection, and comprising a control connection coupled to the second tap.

4. The amplifier circuit of claim 1 , wherein the first impedance comprises a first resistance and the second impedance comprises a second resistance.

5. The amplifier circuit of claim 2 , wherein the first series circuit further comprises a third component configured as a diode and connected between the first component and the first impedance, or between the first impedance and the reference potential connection.

6. An amplifier circuit, comprising:

a first series circuit connected between a supply voltage connection and a reference potential connection, wherein the first series circuit comprises:

a current source;

a first tap connected between the current source and the reference potential connection;

a first component configured as a diode, and a first impedance in series therewith connected between the first tap and the reference potential connection;

a second series circuit connected between the supply voltage connection and the reference potential connection wherein the second series circuit comprises:

a controlled path extending between a first connection and a second connection of a first transistor, the first transistor further comprising a control connection coupled to the first tap; and

a second impedance connected between the controlled path of the first transistor and the reference potential connection, having a first connection connected to the controlled path of the first transistor and a second connection connected to a second tap forming a bias voltage node;

an amplifier stage coupled to the second tap, wherein the bias voltage node sets an operating point of the amplifier stage and comprises:

a second component configured as a diode and connected between the second tap and the reference potential connection;

a second transistor comprising a controlled path extending between a first connection and a second connection of the second transistor wherein the controlled path is connected between the supply voltage connection and the reference potential connection; and

a third impedance which comprises a coil and couples a control connection of the second transistor to the second tap.

7. The amplifier circuit of claim 6 , wherein the amplifier stage further comprises a matching network which, at a first connection, is connected to the first connection of the second transistor and, at a second connection, is connected to the supply voltage connection and, at a third connection, is connected to an output of the amplifier stage.

8. The amplifier circuit of claim 6 , wherein a control connection of the second transistor is coupled, via a further matching network, to an input of the amplifier circuit that is coupled to the bias voltage node.

9. The amplifier circuit of claim 6 , wherein the first series circuit further comprises a third component that is configured as a diode and is connected between the first component, and the first impedance, or between the first impedance and the reference potential connection.

10. An amplifier circuit, comprising:

a first series circuit connected between a supply voltage connection and a reference potential connection wherein the first series circuit comprises:

a current source;

a first tap connected between the current source and the reference potential connection; and

a first transistor having a first connection and a control connection coupled to one another, wherein the first transistor is connected between the first tap and the reference potential connection;

a second series circuit connected between the supply voltage connection and the reference potential connection, wherein the second series circuit is configured to mirror a first current, which flows in the first series circuit, with scaling, and comprises:

a controlled path between a first connection and a second connection of a second transistor having a control connection coupled to the first tap; and

a second tap coupled to the controlled path of the second transistor, wherein the first and second series circuits cooperatively operate to generate a bias voltage thereof;

an amplifier stage coupled to the second tap, wherein the bias voltage sets an operating point of the amplifier stage, wherein the amplifier stage further comprises a third transistor having a first connection and a control connection coupled to one another and, wherein the third transistor is connected between the second tap and the reference potential connection.

11. The amplifier circuit of claim 10 , further comprising a first resistance coupling the first connection of the first transistor to the control connection of the first transistor, and a second resistance coupling the control connection of the first transistor to a second connection of the first transistor.

12. An amplifier circuit, comprising:

a first series circuit connected between a supply voltage connection and a reference potential connection wherein the first series circuit comprises:

a current source;

a first tap connected between the current source and the reference potential connection; and

a first transistor having a first connection and a control connection coupled to one another, wherein the first transistor is connected between the first tap and the reference potential connection;

a second series circuit connected between the supply voltage connection and the reference potential connection, wherein the second series circuit is configured to mirror a first current, which flows in the first series circuit, with scaling, and comprises:

a controlled path between a first connection and a second connection of a second transistor having a control connection coupled to the first tap; and

a second tap coupled to the controlled path of the second transistor, wherein the first and second series circuits cooperatively operate to generate a bias voltage thereof;

an amplifier stage coupled to the second tap, wherein the bias voltage sets an operating point of the amplifier stage,

wherein the first series circuit further comprises a first impedance connected in series with a controlled path of the first transistor; and

wherein the second series circuit further comprises a second impedance connected between the controlled path of the second transistor and the second tap, a ratio between the second current flowing in the second series circuit and the first current depends on the first and second impedances.

13. The amplifier circuit of claim 12 , wherein the first impedance comprises a first resistance and the second impedance comprises a second resistance.

14. An amplifier circuit, comprising:

a first series circuit connected between a supply voltage connection and a reference potential connection wherein the first series circuit comprises:

a current source;

a first tap connected between the current source and the reference potential connection; and

a first transistor having a first connection and a control connection coupled to one another, wherein the first transistor is connected between the first tap and the reference potential connection;

a second series circuit connected between the supply voltage connection and the reference potential connection, wherein the second series circuit is configured to mirror a first current, which flows in the first series circuit, with scaling, and comprises:

a controlled path between a first connection and a second connection of a second transistor having a control connection coupled to the first tap; and

a second tap coupled to the controlled oath of the second transistor, wherein the first and second series circuits cooperatively generate to generate a bias voltage thereof;

an amplifier stage coupled to the second tap, wherein the bias voltage sets an operating point of the amplifier stage, wherein the amplifier stage further comprises a third transistor having a controlled path extending between a first connection and a second connection of a fourth transistor that is connected between the supply voltage connection and the reference potential connection and having a control connection coupled to the second tap.

15. The amplifier circuit of claim 12 , wherein the first series circuit further comprises a third transistor having a first connection and a control connection coupled to one another, and wherein the third transistor is connected between the controlled path of the first transistor, and the first impedance, or between the first impedance and the reference potential connection.

Assignments (5)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 29, 2022
From: INTEL DEUTSCHLAND GMBH
To: INTEL CORPORATION
Reel/Frame 061356/0001 →
CHANGE OF NAME Recorded Nov 6, 2015
From: INTEL MOBILE COMMUNICATIONS GMBH
To: INTEL DEUTSCHLAND GMBH
Reel/Frame 037057/0061 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 19, 2012
From: INTEL MOBILE COMMUNICATIONS TECHNOLOGY GMBH
To: INTEL MOBILE COMMUNICATIONS GMBH
Reel/Frame 027556/0709 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 18, 2012
From: INFINEON TECHNOLOGIES AG
To: INTEL MOBILE COMMUNICATIONS TECHNOLOGY GMBH
Reel/Frame 027548/0623 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 16, 2006
From: ASAM, MICHAEL
To: INFINEON TECHNOLOGIES AG
Reel/Frame 018423/0972 →