Cell disassembly unit
View Patent ↗The present invention provides a cell disassembly unit which accurately reproduces the position of data on a time axis when ATM cells are converted into STM signals even if cell loss occurs in an ATM network. A cell loss detection circuit disassembles the ATM cells into bytes, sends them to the memory, and detects the number of lost bytes M of the ATM cells. A sequence number generation circuit generates the sequence number N, which is N=N+1 if there is no loss, and N=N+M if there is loss, in the sequence of the transmission of bytes from the cell loss detection circuit. A write address generation circuit generates a write address, and a read address generation circuit generates a read address. A selector sends either the bytes read from the memory or dummy data generated by the dummy data generation circuit to the outside as STM signals. A sequence number confirmation circuit checks the continuity of the sequence numbers N read from the memory, and sends the dummy data insertion signal to the read address generation circuit and the selector if the sequence number has jumped.
1. A cell disassembly unit for converting ATM cells into STM signals, comprising a cell loss detection section, write address generation section, first dummy data generation section, first selector, memory, read address generation section, second dummy data generation section, output data holding section and a second selector, wherein:
said cell loss detection section disassembles said ATM cells sent from the outside into bytes, and sequentially sends said bytes after disassembly to said first selector, and also detects the loss of said ATM cells;
said first selector selects either said bytes read from said cell loss detection section or dummy data generated by said first dummy data generation section and sends the selected data to said memory;
said write address generation section generates a write address which changes by a predetermined number each time if there is no ATM cell loss according to the sequence of the transmission of said data, and which changes for the number of lost bytes if the loss of said ATM cells occurs, in order to write said data to said memory;
said read address generation section generates a read address for reading said data in the sequence of addresses from said memory;
said second selector sends said data read from said memory to said output data holding section, then sends the dummy data generated by said second dummy data generation section to said memory, and said output data holding section holds said data read from said memory for a predetermined period, then sends said data to a STM network as said STM signals.
2. A cell disassembly unit of claim 1 , wherein the predetermined number is 1.