IP Library Granted Patent US 7,449,896
Granted Patent B2
US 7,449,896 · App. 11/496,981 · Granted Nov 11, 2008

Current sensor using level shift circuit

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Quick Facts
Patent No.
US 7,449,896
App. No.
11/496,981
Granted
Nov 11, 2008
Kind
B2
Abstract

A circuit for sensing a current includes a first upper resistor having a first end coupled to a first end of a sense resistor, the sense resistor being configured to receive an input current. A second upper resistor has a first end coupled to a second end of the sense resistor, so that the sense resistor defines a first potential between the first and second ends of the sense resistor. A first lower resistor is provided between the first upper resistor and the ground. A second lower resistor is provided between the second upper resistor and the ground. An amplifier has a first input node and a second input node, the first input node being coupled to a node between the first upper resistor and the first lower resistor. The second input node is coupled to a node between the to the second upper resistor and the second lower resistor. The first and second input nodes defines a second potential corresponding to the first potential.

Claims (35)

1. A circuit for sensing a current, the circuit comprising:

a first upper resistor having a first end coupled to a first end of a sense resistor, the sense resistor being configured to receive an input current;

a second upper resistor having a first end coupled to a second end of the sense resistor, so that the sense resistor defines a first potential between the first and second ends of the sense resistor;

a first lower resistor provided between the first upper resistor and the ground;

a second lower resistor provided between the second upper resistor and the ground;

a first capacitor provided in parallel to the first upper resistor;

a second capacitor provided in parallel to the second upper resistor;

a third capacitor provided between a power source and a node connected to the first upper resistor and the sense resistor;

an amplifier having a first input node and a second input node, the first input node being coupled to a node between the first upper resistor and the first lower resistor, the second input node being coupled to a node between the second upper resistor and the second lower resistor, the first and second input nodes defining a second potential corresponding to the first potential;

a fourth capacitor provided between the first input node of the amplifier and the ground;

a fifth capacitor provided between the second input node of the amplifier and the ground; and

wherein the circuit is enclosed within a single package.

2. The circuit of claim 1 , wherein the first and second upper resistors have substantially the same resistive value, and the first and second lower resistors have substantially the same resistive value.

3. The circuit of claim 2 , wherein the first and second upper resistors and the first and second lower resistors are configured to provide a given attenuation, so that the second potential is the first potential that is attenuated by a given ratio.

4. The circuit of claim 1 , wherein the amplifier is an instrumentation amplifier.

5. The circuit of claim 1 , wherein the circuit is provided on a single semiconductor chip.

6. The circuit of claim 5 , wherein the single semiconductor chip is packaged in plastic to provide a discrete packaged current sensor.

7. The circuit of claim 6 , wherein the discrete packaged current sensor is rated to handle the input current of 100 volts or more.

8. The circuit of claim 6 , wherein the discrete packaged current sensor is configured to handle the input current of at least 10 amperes.

9. A current sensor, comprising:

a semiconductor substrate;

a first upper resistor defined on the substrate and having a first end coupled to a first end of a sense resistor, the sense resistor being configured to receive an input current;

a second upper resistor defined on the substrate and having a first end coupled to a second end of the sense resistor, so that the sense resistor defines a first potential between the first and second ends of the sense resistor;

a first lower resistor defined on the substrate and provided between the first upper resistor and the ground;

a second lower resistor defined on the substrate and provided between the second upper resistor and the ground;

a first capacitor provided in parallel to the first upper resistor;

a second capacitor provided in parallel to the second upper resistor;

a third capacitor provided between a power source and a node connected to the first upper resistor and the sense resistor;

an amplifier defined on the substrate and having a first input node and a second input node, the first input node being coupled to a node between the first upper resistor and the first lower resistor, the second input node being coupled to a node between the second upper resistor and the second lower resistor, the first and second input nodes defining a second potential corresponding to the first potential;

a fourth capacitor provided between the first input node of the amplifier and the ground; and

a fifth capacitor provided between the second input node of the amplifier and the ground.

10. The circuit of claim 9 , wherein the semiconductor substrate is packaged in plastic to provide a discrete packaged current sensor.

11. The circuit of claim 10 , wherein the discrete packaged current sensor is rated to handle the input current of 100 volts or more.

12. The circuit of claim 10 , wherein the discrete packaged current sensor is rated to handle the input current of 300 volts or more.

13. The circuit of claim 10 , wherein the discrete packaged current sensor is configured to handle the input current of at least 10 amperes.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 1, 2019
From: IXYS, LLC
To: LITTELFUSE, INC.
Reel/Frame 049056/0649 →
MERGER AND CHANGE OF NAME Recorded Mar 31, 2018
From: IXYS CORPORATION; IXYS, LLC
To: IXYS, LLC
Reel/Frame 045406/0612 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 31, 2006
From: OCHI, SAM SEIICHIRO
To: IXYS CORPORATION
Reel/Frame 018114/0219 →