IP Library Granted Patent US 7,711,395
Granted Patent B2
US 7,711,395 · App. 11/498,584 · Granted May 4, 2010

Circuit current generation apparatus and method thereof, and signal processing apparatus

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Quick Facts
Patent No.
US 7,711,395
App. No.
11/498,584
Granted
May 4, 2010
Kind
B2
Abstract

A semiconductor integrated circuit for use in a receiver can reduce fluctuations in characteristics caused by fluctuations in current to thereby reduce dissipation power. A bias current detection circuit and a current control circuit are provided to decrease a current of a high-frequency circuit if a bias current is large and, if the bias current is small, increase the current of the high-frequency circuit, so as to prevent characteristics of the high-frequency circuit from deteriorating and to reduce the current, thereby enabling reducing dissipation power.

Claims (25)

1. A signal processing apparatus comprising:

a mixer which is connected to an antenna circuit operable to receive a broadcast signal having a desired frequency in order to convert said broadcast signal into a predetermined intermediate-frequency signal or baseband signal;

a local oscillator operable to generate a signal having a frequency corresponding to said broadcast signal;

a buffer circuit operable to receive an output of said local oscillator to supply a local-oscillated signal to said mixer;

a frequency divider operable to divide a frequency of an output of said local oscillator;

a PLL circuit operable to operate in response to an output of said frequency divider so that said local oscillator output may have a predetermined frequency;

an intermediate-frequency signal processing section operable to receive an output of said mixer to process the intermediate-frequency signal or the baseband signal;

a reference current source operable to supply a constant current to said mixer, said local oscillator, said frequency divider, said PLL circuit, and said intermediate-frequency signal processing section;

a bias current detection section operable to detect a current value of said reference current source; and

a current control circuit operable to control current values of said mixer, said local oscillator, said frequency divider, said PLL circuit, and said intermediate-frequency signal processing section in accordance with an output of said bias current detection section.

2. The signal processing apparatus according to claim 1 , comprising:

first and second current sources generated by a reference voltage source and a first resistor;

a second resistor which is connected to said first current source and has a structure equal to that of said first resistor; and

a third resistor which is connected to said second current source,

wherein a difference between voltages generated through said second and third resistors respectively is detected to detect a bias current value in said signal processing apparatus.

3. The signal processing apparatus according to claim 1 , comprising:

a first resistor arranged between a first reference voltage source and a second reference voltage source; and

a second resistor through which a current equal to that flowing through said first resistor flows and of which one electrode is connected to said second reference voltage source,

wherein a difference between voltages generated at both ends of said first and second resistors respectively is detected to detect a bias current value in said signal processing apparatus.

4. The signal processing apparatus according to claim 1 , wherein by current control by said current control circuit, if a bias current value is small, a current of an emitter follower is increased, and if the bias current value is large, the current of the emitter follower is decreased.

5. The signal processing apparatus according to claim 1 , wherein by current control by said current control circuit, if a bias current value is small, a current of a source follower is increased, and if the bias current value is large, the current of the source follower is decreased.

6. The signal processing apparatus according to claim 1 , wherein by current control by said current control circuit, if a bias current value is small, a current of said local oscillator is increased, and if the bias current value is large, the current of said local oscillator is decreased.

7. The signal processing apparatus according to claim 1 , wherein by current control by said current control circuit, if a bias current value is small, a current of said mixer is increased, and if the bias current value is large, the current of said mixer is decreased.

8. The signal processing apparatus according to claim 1 , wherein by current control by said current control circuit, if a bias current value is small, a current of a differential amplifier is increased, and if the bias current value is large, the current of the differential amplifier is decreased.

9. The signal processing apparatus according to claim 1 , comprising a switch circuit at an output terminal of said current control circuit, wherein in accordance with an output of said current control circuit, said switch circuit conducts current control by switching currents of said mixer, said local oscillator, said frequency divider, said PLL circuit, and said intermediate-frequency signal processing section.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 3, 2014
From: PANASONIC CORPORATION (FORMERLY MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.)
To: GODO KAISHA IP BRIDGE 1
Reel/Frame 032152/0514 →
CHANGE OF NAME Recorded Nov 20, 2008
From: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
To: PANASONIC CORPORATION
Reel/Frame 021897/0534 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 21, 2006
From: OBA, YASUO
To: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
Reel/Frame 018285/0129 →