IP Library Granted Patent US 7,393,759
Granted Patent B2
US 7,393,759 · App. 11/501,818 · Granted Jul 1, 2008

Semiconductor substrate, method for fabricating the same, and method for fabricating semiconductor device

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Quick Facts
Patent No.
US 7,393,759
App. No.
11/501,818
Granted
Jul 1, 2008
Kind
B2
Abstract

In a semiconductor substrate having a notch in an edge portion thereof, each of the two shoulder portions of the notch is configured as an arc and the difference in curvature between the two shoulder portions of the notch is not less than 0 mm and not more than 0.1 mm.

Claims (11)

1. A method for fabricating a semiconductor device using a semiconductor substrate in which a notch is formed in an edge portion thereof, the notch has two shoulder portions each configured as an arc, a difference in curvature between the two shoulder portions is not less than 0 mm and not more than 0.1 mm, and each of the two shoulder portions has a curvature not less than 0.3 mm and not more than 2.0 mm, the method comprising the steps of:

burying an insulating film or a conductive film in a depressed portion provided in the semiconductor substrate; and

planarizing the insulating film or the conductive film by chemical mechanical polishing.

2. A method for fabricating a semiconductor device using a semiconductor substrate in which a notch is formed in an edge portion thereof, the notch has two shoulder portions each configured as an arc, a difference in curvature between the two shoulder portions is not less than 0 mm and not more than 0.1 mm, and each of the two shoulder portions has a curvature not less than 0.3 mm and not more than 2.0 mm, the method comprising the steps of:

forming an end-point detection film on the semiconductor substrate;

performing etching with respect to the end-point detection film and the semiconductor substrate by using a mask pattern to form an isolation trench;

burying an insulating film in the isolation trench; and

planarizing the insulating film by chemical mechanical polishing.

3. The method of claim 2 , wherein a polishing speed for the insulating film is double or more a polishing speed for the end-point detection film in the step of planarizing the insulating film.

4. The method of claim 2 , further comprising, after the step of planarizing the insulating film, the step of:

polishing the end-point detection film by chemical mechanical polishing.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 27, 2020
From: PANASONIC CORPORATION
To: PANASONIC SEMICONDUCTOR SOLUTIONS CO., LTD.
Reel/Frame 052755/0917 →
CHANGE OF NAME Recorded Mar 18, 2020
From: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
To: PANASONIC CORPORATION
Reel/Frame 052184/0943 →