IP Library Granted Patent US 7,675,499
Granted Patent B2
US 7,675,499 · App. 11/504,142 · Granted Mar 9, 2010

Display device

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Quick Facts
Patent No.
US 7,675,499
App. No.
11/504,142
Granted
Mar 9, 2010
Kind
B2
Abstract

In a display device with a buffer amplifier which receives an input signal on a positive input terminal, has an output terminal connected to a negative input terminal, and outputs a stabilized output signal, a switch for connecting the positive input terminal and the output terminal is provided. By switching the switch ON, the output of the buffer amplifier is set close to the input.

Claims (16)

1. A display device comprising:

a data line corresponding to each column of pixels arranged in a matrix, wherein a data signal for each pixel is supplied to the pixel through the data line, and

an amplifier circuit comprising

a buffer amplifier which receives an input signal on a positive input terminal, has an output terminal connected to a negative input terminal, and outputs a stabilized output signal; and

a switch which switches between states of short-circuit and non-short-circuit between the positive input terminal and the output terminal of the buffer amplifier, wherein the ratio of load capacitance/input capacitance between a load capacitor at the output from the buffer amplifier and an input section capacitor on the input of the buffer amplifier is 1 or less,

wherein

the amplifier circuit supplies the data signal to the data line after stabilizing the data signal,

the input signal is an analog output obtained by charging a plurality of capacitors in accordance with a value of each bit of a digital signal and averaging charged voltages of the plurality of capacitors, wherein each of the plurality of capacitors has a capacitance weighted corresponding to each bit of the digital signal of a plurality of bits,

the output signal is supplied to a data line having a predetermined capacitance,

an average of charged voltages of the plurality of capacitors is obtained by connecting one terminal of each of the plurality of capacitors in parallel using a connection switch, and

the switch is switched ON after a predetermined time has elapsed after the connection switch is switched ON.

2. A display device according to claim 1 , wherein

an average of charged voltages of the plurality of capacitors is obtained by setting both terminals of each of the plurality of capacitors according to a value of each bit of the digital signal, and

the switch is switched ON after a predetermined time has elapsed after the charging.

3. An amplifier circuit according to claim 1 , wherein

the switch comprises a transistor and a gate capacity of the switch is 1/10 or less of the load capacitor and input section capacitor.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 8, 2013
From: SONY CORPORATION
To: JAPAN DISPLAY WEST INC.
Reel/Frame 031378/0243 →