Heterojunction bipolar transistor and manufacturing method thereof
View Patent ↗In the method for manufacturing a heterojunction bipolar transistor, a collector contact layer, a collector layer, a base layer, a base protection layer, an emitter layer, an emitter contact layer, and a WSi layer are sequentially formed on a substrate. A resist pattern is then formed on the WSi layer, and the WSi layer is patterned by using the resist pattern as a mask. Thereafter, the emitter contact layer and the emitter layer are sequentially removed by ICP (Inductively Coupled Plasma) dry etching by using the resist pattern as a mask.
1. A method for manufacturing a heterojunction bipolar transistor, comprising the steps of:
(a) sequentially forming a collector layer, a base layer, a base protection layer, an emitter layer, an emitter contact layer, and a first metal film on a substrate;
(b) after the step (a), forming a first resist on a part of the first metal film;
(c) after the step (b), patterning the first metal film by using the first resist as a mask;
(d) after the step (c), conducting dry etching at a higher selectivity of the emitter layer over the emitter contact layer until the base protection layer is exposed by using the first resist layer as a mask, in order to make a width of the emitter layer narrower than that of the emitter contact layer;
(e) after the step (d), removing the first resist to expose the first metal film; and
(f) after the step (e), depositing a second metal film after forming a second resist that exposes the first metal film and the exposed part of the base protection layer, and removing the second resist and a part of the second metal film which is located on the second resist.
2. The method according to claim 1 , wherein the dry etching of the step (d) is conducted by using a gas containing chlorine.
3. The method according to claim 1 , wherein the dry etching of the step (d) is conducted by using a gas containing silicon tetrachloride.
4. The method according to claim 1 , further comprising the step of (g) between the steps (c) and (d), removing at least a part of the emitter contact layer by dry etching by using the first resist as a mask.
5. The method according to claim 4 , wherein the dry etching of the step (g) is conducted by using a gas containing argon and chlorine.