Hysteresis comparator for input voltages and corresponding electronic circuit
The disclosure relates to a hysteresis comparator of a first input voltage and a second input voltage. The comparator includes a first differential stage whose first and second inputs are respectively powered by the said first and second input voltages, and at least one second differential stage symmetrical to the said first differential stage. Two inputs of the said second differential stage are respectively powered by first and second reference voltages. At least one first current, dependent on the difference between the first and second input voltages, is compared with at least one second current dependent on the difference between the second and first reference voltages.
1 . A hysteresis comparator of a first input voltage and a second input voltage, comprising:
a first differential stage whose first and second inputs are respectively supplied by the said first and second input voltages,
at least one second differential stage symmetrical to the said first differential stage, wherein first and second inputs of the said second differential stage are respectively powered by a first and a second reference voltage,
a circuit, which compares at least one first current, dependent on the difference between the first and second input voltages, with at least one second current dependent on the difference between the second and first reference voltages.
2 . The comparator of claim 1 , wherein the said first and second symmetrical differential stages are polarised by a same polarisation current and have an identical load, so as to optimise the pairing of the said differential stages.
3 . The comparator of claim 1 , wherein the said circuit comprises at least one pair of transistors assembled so as to form a current mirror.
4 . The comparator of claim 1 , wherein the first differential stage comprises a first and a second input transistors whose drains are connected, wherein the gates of the first and second input transistors form the first and second inputs of the said first differential stage, with an input current circulating in the second input transistor,
and wherein the second differential stage comprises one first and one second reference transistor whose drains are connected, the gates of the first and second reference transistors receiving the first and second reference voltages, one first and one second reference currents circulating in the first and second reference transistors.
5 . The comparator of claim 1 , wherein the said first and second differential stages are made using identical components and have the same manufacturing process parameters.
6 . The comparator of claim 4 , wherein said comparator comprises a first circuit, which compares the input current with the first reference current, providing at least one first voltage that is representative of a result of the said first comparison, called first comparison voltage, and a second circuit, which compares the input current with the second reference current, providing at least one second voltage that is representative of a result of the said second comparison, called second comparison voltage.
7 . The comparator of claim 6 , wherein:
the first comparison voltage takes a first upper value if the input current is greater than or equal to the first reference current and takes a first lower value otherwise; and
the second comparison voltage takes a second upper value if the input current is greater than or equal to the second reference current and takes a second lower value otherwise.
8 . The comparator of claim 6 , wherein the first and second circuits each comprises at least one pair of transistors assembled so as to form a current mirror.
9 . The comparator of claim 6 , wherein said comparator comprises an output stage, which generates an output voltage taking account of the said first and second comparison voltages, wherein the said output voltage can take at least one lower value and at least one upper value.
10 . The comparator of claim 9 , wherein:
if the first and second comparison voltages respectively take the first and second lower values then the output voltage takes its lower value; and
if the first and second comparison voltages take respectively the first and second upper values then the output voltage takes its upper value.
11 . The comparator of claim 9 , wherein:
a transition of the output voltage from its lower value to its upper value is activated by a transition of the second comparison voltage from the second lower value to the second upper value when the first comparison voltage takes the first upper value, and
a transition of the output voltage from its upper value to its lower value is activated by a transition of the first comparison voltage from the first upper value to the first lower value when the second comparison voltage takes the second lower value.
12 . The comparator of claim 9 , wherein the output stage comprises three NAND gates and one OR gate.
13 . The comparator of claim 1 , wherein the said reference voltages are supplied by a band gap type assembly.
14 . The comparator of claim 1 , wherein the said reference voltages are supplied by a voltage divider type assembly associated to a regulator.
15 . Electronic circuit wherein the electronic circuit comprises the comparator of claim 1 .
16 . A method of comparing a first input voltage and a second input voltage, comprising:
supplying the first and second input voltages to first and second inputs, respectively, of a first differential stage;
supplying first and second reference voltages to first and second inputs, respectively, of a second differential stage, wherein the second differential stage is symmetrical to the first differential stage; and
comparing at least one first current, dependent on a difference between the first and second input voltages, with at least one second current dependent on a difference between the second and first reference voltages.