Semiconductor mount

1. A mount for a semiconductor device having a first surface with at least one contact region and a second surface, the mount comprising:

a. a planar substrate to receive the second surface of the semiconductor device;

b. an element having an aperture sized to surround the semiconductor device wherein a first surface of the element is mounted to the substrate and is located to surround the semiconductor device such that the semiconductor device is aligned by the aperture; and

c. a means for mounting the semiconductor device to the substrate in an aligned position wherein the semiconductor device comprises an energy conversion type cell.

2. The mount according to claim 1 , wherein the element is mounted to the substrate in a predetermined location.

3. The mount according to claim 1 , wherein the element comprises a flexible electrically insulated material.

4. The mount according to claim 1 , wherein the element further includes at least one conductive trace electrically coupled to the at least one contact region.

5. The mount according to claim 1 , wherein the element further comprises an integrally formed flap extending into the aperture and sized to overlap the semiconductor device, wherein the flap includes an exposed conductive trace on the first surface and positioned to electrically couple to the at least one contact region.

6. The mount according to claim 5 further comprising a plurality of flaps, each flap having the exposed conductive trace making contact to the at least one contact region.

7. The mount according to claim 1 , wherein the element comprises a plurality of apertures each adapted to receive and align a semiconductor device and each aperture having at least one flap.

8. The mount according to claim 1 , wherein the semiconductor device is coupled to the element with a reflowed solder.

9. The mount according to claim 1 , wherein the semiconductor device is coupled to the substrate with a reflowed solder.

10. A mount for a semiconductor device having a first surface with at least one contact region and a second surface, the mount comprising:

a. a planar substrate to receive the second surface of the semiconductor device;

b. an element having an aperture sized to surround the semiconductor device wherein a first surface of the element is mounted to the substrate and is located to surround the semiconductor device such that the semiconductor device is aligned by the aperture; and

c. a means for mounting the semiconductor device to the substrate in an aligned position wherein the semiconductor device comprises an energy conversion type cell;

wherein the contact region of the first surface of the semiconductor device comprises a negative terminal for the cell,

wherein the second surface of the semiconductor device comprises a positive terminal for the cell,

wherein the element comprises a first conductive trace for the negative terminal, and a second conductive trace for the positive terminal,

wherein the element is configured to position the first and second conductive traces in relation to the negative and positive terminals, and

wherein the element is configured to insulatively separate the first and second conductive traces.

11. A method of mounting a semiconductor device having a first surface with at least one contact region and a second surface, the method comprising:

providing a planar substrate adapted to receive the second surface of the semiconductor device;

aligning the semiconductor device by coupling an element having an aperture sized to surround the semiconductor device to the substrate; and

coupling the semiconductor device to the substrate, wherein the semiconductor device comprises an energy conversion type cell.

12. The method according to claim 11 , including the step of mounting the planar element to the substrate in a predetermined location.

13. The method according to claim 11 , including the step of forming at least one conductive trace in the element, wherein at least the one conductive trace is electrically coupled to the at least one contact region.

14. The method according to claim 13 , further comprising:

the step of integrally forming a flap extending into the aperture; and

sizing the flap to overlap the semiconductor device, wherein the flap includes an exposed conductive trace on the first surface and positioned to electrically couple to the at least one contact region.

15. The method according to claim 14 , further comprising the step of forming a plurality of flaps, each flap having the exposed conductive trace making contact to the at least one contact region.

16. The method according to claim 11 , further comprising the step of forming a plurality of apertures in the element each adapted to receive and align a semiconductor device and each aperture having at least one flap.

17. The method according to claim 11 , further comprising the step of reflowing solder to couple the semiconductor device to the substrate.

18. The method according to claim 11 , further comprising:

providing a negative terminal by using the first surface;

providing a positive terminal by using the second surface;

positioning a first conductor for the negative terminal;

positioning a second conductor for the positive terminal;

insulatively separating the first and second conductors by using the element;

coupling the first conductor to the negative terminal; and

coupling the second conductor to the positive terminal.

19. The method according to claim 18 , wherein the step of forming the element includes forming an integral flap adapted to overlap the cell, wherein the flap exposes a conductive trace to contact the at least one exposed contact region, wherein the aperture and flap are formed by die punching the aperture and the flap in a single operation.

20. A method of mounting an energy conversion cell comprising the steps of:

placing the cell near a predetermined location on a substrate wherein the cell includes at least one exposed contact region;

mounting an electrically insulated flexible element having an aperture sized to

surround the cell and further includes a conductive trace formed therein; and

mounting the element to the substrate such that the aperture surrounds and aligns the cell forming an electrical connection between the at least one exposed contact region and the conductive trace.