Data link/physical layer packet buffering and flushing
View Patent ↗A buffering structure including at least a first FIFO storage structure to stage at least a selected one of undiverted egress packets and undiverted ingress packets is provided. The buffering structure further includes at least first associated packet drop logic to selectively effectuate head or tail flushes of the first FIFO storage structure. In various embodiments, one or more additional FIFO storage structures are also provided to stage one or more diverted and/or insertion of egress/ingress packets. Those use for staging diverted egress/ingress packets are likewise provided with associated packet drop logic to perform tail flushes of these additional FIFO structures. In one application, the buffering structure is employed by a multi-protocol network processor, which in turn is employed by an optical networking module.
1. An optical networking module comprising:
an optical component configured to send and receive optical signals encoded with data transmitted through a coupled optical medium;
an optical-electrical component coupled to the optical component configured to encode digital data onto optical signals and to decode encoded digital data on optical signals back into their digital forms;
a data link/physical layer processing unit, coupled to the optical-electrical component and to a packet source/sink, including a buffering structure having at least a first FIFO storage structure configured to stage a selected one of undiverted ones of a plurality of ingress packets and undiverted ones of a plurality of egress packets, and first associated packet drop logic coupled to the first FIFO storage structure to selectively effectuate head or tail flush of the first FIFO storage structure; and
a body encasing said optical component, said optical-electrical component, and said data link/physical processing unit as a single module.
2. The optical networking module of claim 1 , wherein said first associated packet drop logic comprises both write drop logic coupled to an input end of the first FIFO storage structure and being configured to perform a tail flush of the first FIFO storage structure under a first plurality of conditions, and read drop logic coupled to an output end of the first FIFO storage structure and configured to perform a head flush of the first FIFO storage structure under said first plurality of conditions.
3. The optical networking module of claim 1 , wherein said first FIFO storage stages undiverted ones of said plurality of ingress packets, wherein said buffering stage further comprises at least a second FIFO storage structure configured to stage undiverted ones of said plurality of egress packets, and wherein said data link/physical layer processing unit further comprises second associated packet drop logic coupled to the second FIFO storage structure and being configured to effectuate tail flushes of the second FIFO storage structure.
4. The optical networking module of claim 1 , wherein said first FIFO storage stages undiverted ones of said plurality of egress packets, wherein said buffering stage further comprises at least a second FIFO storage structure configured to stage diverted ones of the plurality of egress packets, and wherein said data link/physical layer processing unit further comprises second associated packet drop logic coupled to the second FIFO storage structure and being configured to effectuate tail flushes of the second FIFO storage structure.
5. The optical networking module of claim 1 , wherein said first FIFO storage stages undiverted ones of said plurality of egress packets, wherein said buffering stage further comprises at least a second FIFO storage structure configured to stage insertion ones of the plurality of egress packets, and wherein said data link/physical layer Processing unit further comprises second associated packet drop logic coupled to the second FIFO storage structure and being configured to effectuate head flushes of the second FIFO storage structure.
6. The optical networking module of claim 1 , wherein said first FIFO storage stages undiverted ones of said plurality of ingress packets, wherein said buffering stage further comprises at least a second FIFO storage structure configured to stage diverted ones of the plurality of ingress packets, and wherein said data link/physical layer processing unit further comprises second associated packet drop logic coupled to the second FIFO storage structure and being configured to effectuate tail flushes of the second FIFO storage structure.
7. The optical networking module of claim 1 , wherein said first FIFO storage stages undiverted ones of said plurality of ingress packets, wherein said buffering stage further comprises at least a second FIFO storage structure configured to stage insertion ones of the plurality of ingress packets, and wherein said data link/physical layer processing unit further comprises second associated packet drop logic coupled to the second FIFO storage structure and being configured to effectuate head flushes of the second FIFO storage structure.
8. The optical networking module of claim 1 , wherein said optical and optical-electrical components and said data link/physical layer processing unit are all configured to support data rates up to at least 10 GB/s.
9. The optical networking module of claim 1 , wherein said data link/physical layer processing unit includes a multi-protocol processor configured to support a plurality of datacom and telecom protocols.