IP Library Granted Patent US 7,996,843
Granted Patent B2
US 7,996,843 · App. 11/515,675 · Granted Aug 9, 2011

Symmetric multi-processor system

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,996,843
App. No.
11/515,675
Granted
Aug 9, 2011
Kind
B2
Abstract

The present invention relates generally to computer operating systems, and more specifically, to operating system calls in a symmetric multiprocessing (SMP) environment. Existing SMP strategies either use a single lock or multiple locks to limit access to critical areas of the operating system to one thread at a time. These strategies suffer from a number of performance problems including slow execution, large software and execution overheads and deadlocking problems. The invention applies a single lock strategy to a micro kernel operating system design which delegates functionality to external processes. The micro kernel has a single critical area, the micro kernel itself, which executes very quickly, while the external processes are protected by proper thread management. As a result, a single lock may be used, overcoming the performance problems of the existing strategies.

Claims (45)

1. A method of symmetric multiprocessing in which one or more processors, a first memory storing a micro kernel operating system in a machine executable form and a second memory storing a thread scheduler in a machine executable form are interconnected via a communication network, wherein the micro kernel operating system comprises a critical area and a non-critical area, said method comprising the steps of:

responding to a first thread requiring a call to the critical area of said micro kernel operating system by requesting a global lock of the critical area of the micro kernel operating system for the first thread;

responding to said global lock being available by performing the steps of:

acquiring said global lock from said thread scheduler for the first thread to access the critical area of the micro kernel operating system;

performing said call to the critical area of said micro kernel operating system, wherein the non-critical area of the micro kernel operating system is available for access by a second thread while the global lock is applied to the critical area of the micro kernel operating system for the first thread; and

releasing said global lock.

2. A method of symmetric multiprocessing as claimed in claim 1 , wherein said micro kernel operating system comprises a pre-emptable micro kernel operating system, said method further comprising the steps with said thread scheduler of:

pre-empting any non-critical threads currently executing on said pre-emptable micro kernel operating system prior to executing said first thread on said pre-emptable micro kernel operating system; and

reinstating said pre-empted threads following said step of executing said first thread on said pre-emptable micro kernel operating system.

3. A method of symmetric multiprocessing as claimed in claim 2 wherein said step of performing said call to said micro kernel operating system comprises the steps of:

entering said pre-emptable micro kernel operating system;

executing operating system functions as required by said first thread; and

exiting said pre-emptable micro kernel operating system.

4. The method of claim 1 , where the act of releasing said global lock comprises releasing the global lock of the critical area before completing an operating system call of the non-critical area for the first thread.

5. The method of claim 1 , where the critical area is limited to operating system message-passing capabilities and the non-critical area comprises operating system functionality delegated to external processes.

6. The method of claim 5 , where the message-passing capabilities comprise inter-process control (IPC) message-passing services.

7. The method of claim 1 , where the global lock comprises an only lock used by the micro kernel operating system to manage threads.

8. The method of claim 1 , further comprising:

executing the first thread on a first processor of the one or more processors; and

executing the second thread on a second processor of the one or more processors.

9. A method of symmetric multiprocessing in which one or more processors, a first memory storing a pre-emptable micro kernel operating system in a machine executable form and a second memory storing a thread scheduler in a machine executable form are interconnected via a communication network, wherein the micro kernel operating system comprises a critical area and a non-critical area, said method comprising the steps of:

responding to a first thread requiring a call to the critical area of said micro kernel operating system by requesting a global lock of the critical area of the micro kernel operating system for the first thread;

pre-empting any non-critical threads currently executing on said pre-emptable micro kernel operating system;

acquiring said global lock from said thread scheduler for the first thread to access the critical area of the micro kernel operating system;

entering said pre-emptable micro kernel operating system;

executing operating system functions of the critical area as required by said first thread, wherein the non-critical area of the micro kernel operating system is available for access by a second thread while the global lock is applied to the critical area of the micro kernel operating system for the first thread;

exiting the critical area of said pre-emptable micro kernel operating system;

releasing said global lock; and

reinstating said pre-empted threads.

10. A computer system comprising:

one or more processors;

a first memory storing a pre-emptable operating system in a machine executable form, wherein the operating system comprises a critical area and a non-critical area;

a second memory storing a lock manager in an machine executable form;

a communication network interconnecting said one or more processors, said first memory and said second memory; and

said lock manager configured to:

respond to a first thread requiring access to the critical area of said pre-emptable operating system by requesting a global lock of the critical area of the operating system for the first thread;

pre-empt any non-critical threads currently executing on said operating system;

acquire said global lock for the first thread to access the critical area of the operating system;

execute the first thread on said operating system, wherein the non-critical area of the operating system is available for access by a second thread while the global lock is applied to the critical area of the operating system for the first thread; and

reinstate said pre-empted threads.

11. The computer system of claim 10 , where the lock manager is further configured to release the global lock of the critical area before completing an operating system call of the non-critical area for the first thread.

12. The computer system of claim 10 , where the critical area is limited to operating system message-passing capabilities and the non-critical area comprises operating system functionality delegated to external processes.

13. The computer system of claim 12 , where the message-passing capabilities comprise inter-process control (IPC) message-passing services.

14. The computer system of claim 10 , where the global lock comprises an only lock used by the operating system to manage threads.

15. The computer system of claim 10 , where the one or more processors comprise a first processor to execute the first thread, and where the one or more processors comprise a second processor to execute the second thread.

Assignments (11)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 16, 2023
From: BLACKBERRY LIMITED
To: MALIKIE INNOVATIONS LIMITED
Reel/Frame 064104/0103 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 4, 2014
From: 8758271 CANADA INC.
To: 2236008 ONTARIO INC.
Reel/Frame 032607/0674 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 4, 2014
From: QNX SOFTWARE SYSTEMS LIMITED
To: 8758271 CANADA INC.
Reel/Frame 032607/0943 →
CHANGE OF ADDRESS Recorded Feb 27, 2012
From: QNX SOFTWARE SYSTEMS LIMITED
To: QNX SOFTWARE SYSTEMS LIMITED
Reel/Frame 027768/0961 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 9, 2011
From: 7801769 CANADA INC.
To: QNX SOFTWARE SYSTEMS LIMITED
Reel/Frame 026883/0553 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 9, 2011
From: QNX SOFTWARE SYSTEMS GMBH & CO. KG
To: 7801769 CANADA INC.
Reel/Frame 026883/0544 →
REGISTRATION Recorded Feb 28, 2011
From: QNX SOFTWARE SYSTEMS GMBH & CO. KG
To: QNX SOFTWARE SYSTEMS GMBH & CO. KG
Reel/Frame 025863/0398 →
CHANGE OF SEAT Recorded Feb 28, 2011
From: QNX SOFTWARE SYSTEMS GMBH & CO. KG
To: QNX SOFTWARE SYSTEMS GMBH & CO. KG
Reel/Frame 025863/0434 →
PARTIAL RELEASE OF SECURITY INTEREST Recorded Jun 3, 2010
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: HARMAN INTERNATIONAL INDUSTRIES, INCORPORATED; QNX SOFTWARE SYSTEMS (WAVEMAKERS), INC.; QNX SOFTWARE SYSTEMS GMBH & CO. KG
Reel/Frame 024483/0045 →
SECURITY AGREEMENT Recorded May 8, 2009
From: HARMAN INTERNATIONAL INDUSTRIES, INCORPORATED; BECKER SERVICE-UND VERWALTUNG GMBH; CROWN AUDIO, INC.; HARMAN BECKER AUTOMOTIVE SYSTEMS (MICHIGAN), INC.; HARMAN BECKER AUTOMOTIVE SYSTEMS HOLDING GMBH; HARMAN BECKER AUTOMOTIVE SYSTEMS, INC.; HARMAN CONSUMER GROUP, INC.; HARMAN DEUTSCHLAND GMBH; HARMAN FINANCIAL GROUP LLC; HARMAN HOLDING GMBH & CO. KG; HARMAN MUSIC GROUP, INCORPORATED; HARMAN SOFTWARE TECHNOLOGY INTERNATIONAL BETEILIGUNGS GMBH; HARMAN SOFTWARE TECHNOLOGY MANAGEMENT GMBH; HBAS INTERNATIONAL GMBH; HBAS MANUFACTURING, INC.; INNOVATIVE SYSTEMS GMBH NAVIGATION-MULTIMEDIA; JBL INCORPORATED; LEXICON, INCORPORATED; MARGI SYSTEMS, INC.; QNX SOFTWARE SYSTEMS (WAVEMAKERS), INC.; QNX SOFTWARE SYSTEMS CANADA CORPORATION; QNX SOFTWARE SYSTEMS CO.; QNX SOFTWARE SYSTEMS GMBH; QNX SOFTWARE SYSTEMS GMBH & CO. KG; QNX SOFTWARE SYSTEMS INTERNATIONAL CORPORATION; QNX SOFTWARE SYSTEMS, INC.; XS EMBEDDED GMBH (F/K/A HARMAN BECKER MEDIA DRIVE TECHNOLOGY GMBH)
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 022659/0743 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 12, 2007
From: VAN DER VEEN, PETER
To: QNX SOFTWARE SYSTEMS GMBH & CO. KG
Reel/Frame 018880/0115 →