Resonant circuit and oscillator having a resonant circuit

1. A resonant circuit, comprising:

a frequency-determining element;

at least one switchable frequency-changing element arranged in parallel with the frequency-determining element, wherein the frequency-changing element comprising:

two series-connected transistors having gate terminals connected to a node configured to receive a fixed potential, and having second source or sink terminals connected to a control input configured to receive a control signal operable to selectively switch the frequency-changing element into or out of the resonant circuit;and

two series-connected charge storage devices, wherein first source or sink terminals of the two series-connected transistors are respectively coupled to the two series-connected charge storage devices and wherein the first source or sink terminals of the two series-connected transistors are not coupled to one another by a transistor.

2. The resonant circuit of claim 1 , wherein the two transistors comprise MOS transistors.

3. The resonant circuit of claim 1 , wherein a difference between the fixed potential on the gate terminals and a reference potential is greater in terms of absolute value than a threshold voltage of the two transistors.

4. The resonant circuit of claim 1 , wherein the transistors are of the n conductivity type, and a control signal on the control input is greater than a threshold voltage for the transistors when the transistors are in the off-state.

5. The resonant circuit of claim 1 , wherein the transistors are of the p conductivity type, and a control signal on the control input is less than a threshold voltage for the transistors when the transistors are in the off-state.

6. The resonant circuit of claim 1 , wherein the two transistors respectively have a substrate connection connected to a reference potential.

7. The resonant circuit of claim 1 , wherein the frequency-determining element comprises an inductance.

8. The resonant circuit of claim 7 , wherein the charge storage devices have a fixed capacitance coupled on parallel with the inductance.

9. The resonant circuit of claim 1 , wherein the control signal has a first potential and at least one second potential, wherein the first potential is the fixed potential and the at least one second potential is a reference potential.

10. The resonant circuit of claim 1 , further comprising a regulated voltage source configured to provide the fixed potential to the node.

11. The resonant circuit of claim 10 , wherein the control input is coupled to an output of an inverter configured to supply the control signal, wherein the inverter is connected to the regulated voltage source at a voltage supply terminal thereof.

12. A resonant system, comprising:

a resonant circuit;

capacitive elements arranged in parallel with the resonant circuit;

a switch circuit comprising series-connected transistors having first source or sink terminals respectively coupled to the capacitive elements wherein the first source or sink terminals are not coupled to one another by a transistor, and configured to selectively switch the capacitive elements into the resonant circuit, wherein the transistors comprise two switching states, and wherein a voltage supplied to a gate terminal thereof is substantially constant and independent of the two switching states during a switching operation, and wherein a switching operation is effected by a control signal coupled to a first source or sink terminal between the series-connected transistors.

13. The resonant system of claim 12 , wherein the voltage supplied to the control terminal is greater in terms of absolute value than a threshold voltage of the transistors.

14. The resonant system of claim 12 , further comprising:

a first tap and a second tap coupled to opposite ends of the resonant circuit and configured to output a differential oscillator signal thereat; and

an amplifying element having a negative impedance arranged in parallel with the resonant circuit.

15. The resonant system of claim 14 , wherein the amplifying element comprises at least one transistor pair having control terminals connected to a first connection of the respective other transistor in the pair, and having second terminals connected to a potential.

16. The resonant system of claim 14 , further comprising a selling input configured to receive a digital setting signal for frequency selling of the resonant system, wherein the control signal is derived from the digital setting signal.

17. A resonant circuit, comprising:

a frequency-determining circuit configured to generate an oscillation signal at a frequency as a function of an inductance and capacitance associated therewith; and

a frequency-changing circuit operably coupled to the frequency-determining circuit, and configured to selectively alter the capacitance associated with the frequency-determining circuit, wherein the frequency-changing circuit comprises:

two series-connected transistors coupled together at a node having first source or sink terminals that are not coupled to one another by a transistor and having a gate terminal connected to a substantially fixed potential, and having a control signal coupled to the node;

capacitances respectively coupled to the series-connected transistors, wherein the capacitances and series-connected transistors are coupled in parallel with the frequency-determining circuit,

wherein the control signal is operable to selectively turn on and turn off the series-connected transistors, thereby altering the capacitance associated with the frequency-determining circuit, and

wherein the substantially fixed potential has an absolute value greater than a threshold voltage of the series-connected transistors.

18. The resonant circuit of claim 17 , wherein when the series-connected transistors are turned off by the control signal, a capacitance associated with the frequency-changing circuit is a function of a parasitic capacitance of the series-connected transistors, and wherein the parasitic capacitance is a function of the substantially fixed potential at the gate terminals thereof.