Semiconductor circuit device and display data line driver
View Patent ↗An N-type diffusion layer fixed at a potential equal to or above 0V is provided in a segregating region between terminals, and a P-type diffusion layer having a potential equal to that of the N-type diffusion layer on an N-type well constitute a drain of a transistor.
1. A semiconductor circuit device comprising:
a P-type well;
a plurality of N-type wells provided on the P-type well;
a plurality of transistors having drains provided on the corresponding N-type wells;
a first high concentration N-type diffusion layer provided on the P-type well in a transistor segregating region of said plurality of transistors;
a first high concentration P-type diffusion layer provided on the P-type well in said transistor segregating region of said plurality of transistors;
a fixed potential supply terminal provided in said transistor segregating region of said plurality of transistors for supplying an equal potential by short-circuiting said first high concentration N-type diffusion layer and said first high concentration P-type diffusion layer;
a second high concentration N-type diffusion layer provided on said N-type well; and
a second high concentration P-type diffusion layer provided on said N-type well, having a potential equal to said second high concentration N-type diffusion layer by short-circuiting said second high concentration P-type diffusion layer and said second high concentration N-type diffusion layer, and provided on drains of said transistors, wherein:
a parasitic PNP bipolar transistor is provided by said second high concentration P-type diffusion layer, said N-type well, said P-type well, and said first high concentration P-type diffusion layer in said transistor segregation region; and
a parasitic NPN bipolar transistor is provided by said second high concentration N-type diffusion layer, said N-type well, said P-type well, and said first high concentration N-type diffusion layer in said transistor segregation region, so that said parasitic PNP bipolar transistor and said parasitic NPN bipolar transistor form a thyristor structure.
2. A display data line driver comprising the semiconductor circuit device according to claim 1 and connected to a display data electrode line of a display panel.
3. A semiconductor circuit device according to claim 1 , wherein said plurality of transistors is provided by CMOS process.