IP Library Granted Patent US 7,526,267
Granted Patent B2
US 7,526,267 · App. 11/521,947 · Granted Apr 28, 2009

Single chip wireless communication integrated circuit

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,526,267
App. No.
11/521,947
Granted
Apr 28, 2009
Kind
B2
Abstract

A multi-mode wireless device on a single substrate includes an analog portion and a digital portion integrated on the single substrate. The analog portion includes a cellular radio core; and a short-range wireless transceiver core. The digital portion integrated on the substrate includes a reconfigurable processor core coupled to the cellular radio core and the short-range wireless transceiver core, the reconfigurable processor adapted to handle a plurality of wireless communication protocols. The digital portion also includes a high-density memory array core coupled to the reconfigurable multi-processor core.

Claims (44)

1. A integrated circuit comprising:

an analog portion including:

a cellular radio core; and

a short-range wireless transceiver core coupled to the cellular radio core; and

a digital portion including:

a reconfigurable processor core coupled to the cellular radio core and the short-range wireless transceiver core to handle a plurality of wireless communication protocols; and

a router coupled to the reconfigurable processor core, the cellular radio core, and the short-range wireless transceiver core, the router to transmit data packets in parallel simultaneously via the cellular radio core and the short-range wireless transceiver core.

2. The integrated circuit of claim 1 , wherein the reconfigurable processor core includes one or more reduced instruction set computer (RISC) processors.

3. The integrated circuit of claim 1 , wherein the integrated circuit is formed on a single substrate including the analog portion and the digital portion.

4. The integrated circuit of claim 1 , wherein the reconfigurable processor core includes multiple programmable processors and multiple dedicated processors configured to handle a plurality of wireless communication protocols.

5. The integrated circuit of claim 1 , wherein the router further comprises an engine to track the destinations of the data packets.

6. The integrated circuit of claim 5 , wherein the router is to send the data packets in parallel through a primary and a secondary communication channel, wherein the primary communication channel comprises a short-range channel and the secondary communication channel comprises a cellular channel.

7. The integrated circuit of claim 1 , further comprising a radio sniffer.

8. The integrated circuit of claim 7 , wherein the router is to determine an optimal transmission medium based on information from the radio sniffer.

9. The integrated circuit of claim 1 , wherein the digital portion further comprises a memory including a volatile array and a non-volatile array.

10. The integrated circuit of claim 1 , wherein the router is to reuse a filter and a decoder for the plurality of wireless communication protocols.

11. A system comprising:

a processor;

a multi-mode wireless integrated circuit coupled to the processor, the integrated circuit comprising:

an analog portion including:

a cellular radio core; and

a short-range wireless transceiver core; and

a digital portion including:

a reconfigurable processor core coupled to the cellular radio core and the short-range wireless transceiver core, the reconfigurable processor core including multiple programmable processors and multiple dedicated processors configured to handle a plurality of wireless communication protocols; and

a router coupled to the reconfigurable processor core, the cellular radio core, and the short-range wireless transceiver core to transmit data packets in parallel simultaneously via the cellular radio core and the short-range wireless transceiver core; and

an output device coupled to the processor to output video information.

12. The system of claim 11 , wherein the multiple programmable processors include one or more digital signal processors (DSPs).

13. The system of claim 12 , wherein the multiple programmable processors include one or more reduced instruction set computer (RISC) processors.

14. The system of claim 11 , wherein the router further comprises an engine to track the destinations of the data packets.

15. The system of claim 11 , wherein the router is to send the data packets in parallel through a primary and a secondary communication channel.

16. The system of claim 11 , wherein the output device comprises a liquid crystal display.

17. A method comprising:

communicating data packets via a cellular radio medium using a system including a multi-mode wireless integrated circuit having a substrate including a cellular radio core, a short-range wireless transceiver core, and a processor core; and

communicating at least some of the data packets in parallel simultaneously via a short-range wireless medium and the cellular radio medium using the multi-mode wireless integrated circuit of the system.

18. The method of claim 17 , further comprising communicating the data packets via a local area connection using an ethernet port of the system.

19. The method of claim 17 , further comprising primarily communicating the data packets via a primary communication channel and periodically communicating the data packets via a secondary communication channel.

20. The method of claim 19 , further comprising communicating the data packets via the short-range wireless medium while in a wireless local area network and communicating the data packets via the cellular radio medium while outside the wireless local area network.

21. A multi-mode wireless integrated circuit comprising:

an analog portion including:

a cellular radio core; and

a short-range wireless transceiver core; and

a digital portion including:

a reconfigurable processor core coupled to the cellular radio core and the short-range wireless transceiver core, the reconfigurable processor core including multiple programmable processors and multiple dedicated processors configured to handle a plurality of wireless communication protocols; and

a router coupled to the reconfigurable processor core, the cellular radio core, and the short-range wireless transceiver core to transmit at least some of the data packets via both the cellular radio core and the short-range wireless transceiver core at the same time.

Assignments (5)
MERGER Recorded Dec 7, 2010
From: GALLITZIN ALLEGHENY LLC
To: INTELLECTUAL VENTURES I LLC
Reel/Frame 025446/0035 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 9, 2008
From: INTELLECT CAPITAL VENTURES L.L.C.
To: AIRIP CORPORATION
Reel/Frame 021652/0970 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 9, 2008
From: AIRIP CORPORATION
To: GALLITZIN ALLEGHENY LLC
Reel/Frame 021653/0051 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 9, 2008
From: AIRIFY COMMUNICATIONS, INC.
To: INTELLECT CAPITAL VENTURES L.L.C.
Reel/Frame 021656/0235 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 9, 2008
From: SCHMIDT, DOMINIK J.
To: AIRIFY COMMUNICATIONS, INC
Reel/Frame 021659/0446 →