IP Library › Patent Application 11522958
Patent Application
App. No. 11/522,958

Semiconductor memory device including an SOI substrate

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Quick Facts
Patent No.
US None
App. No.
11/522,958
Abstract

A semiconductor memory device includes a plurality of N and P channel MOS transistors. The plurality of MOS transistors are formed on an SOI (Silicon On Insulator) substrate. Each MOS transistor includes a source region, a drain region, and a body region located between the source region and the drain region. The body region of at least one N channel MOS transistor is electrically fixed. The body region of at least one P channel MOS transistor is rendered floating.

Claims (5)

1 - 34 . (canceled)

35 . A semiconductor memory device comprising a plurality of MOS semiconductor elements,

wherein said plurality of MOS semiconductor elements are formed on an SOI substrate,

wherein the source regions and the drain regions of said plurality of MOS semiconductor elements are in contact with an insulation layer in said SOI substrate.

36 - 43 . (canceled)