Method for fabricating a thin film transistor for use with a flat panel display device
In a fabrication method of a thin film transistor, a gate electrode is patterned with a first mask and an active pattern and a photoresist pattern are formed with a second mask. The photoresist pattern is ashed based on a predetermined width of an etch stopper. An insulating layer underlying the ashed photoresist pattern is patterned to form the etch stopper. In the fabrication method, the etch stopper may function as a passivation layer and is formed on an active layer of a thin film transistor part.
1. A method for fabricating a thin film transistor, comprising:
forming a first metal layer and a first photoresist pattern on a substrate using a first mask;
patterning the first metal layer using the first photoresist pattern to form a gate electrode on the substrate;
forming an insulating layer, a silicon layer and an etch-stopper layer on the substrate;
forming a second photoresist pattern which has a different thickness on the etch-stopper layer using a second mask;
patterning the insulating layer, the silicon layer and the etch-stopper layer using the second photoresist pattern to form an active pattern and a preliminary etch-stopper;
ashing the second photoresist pattern to form a third photoresist pattern;
patterning the preliminary etch-stopper using the third photoresist pattern to form an etch stopper;
forming an ohmic contact layer and a second metal layer on the substrate including the third photoresist pattern and the etch-stopper;
removing the third photoresist pattern with the ohmic contact layer and the second metal layer over the third photoresist pattern;
forming a fourth photoresist pattern on the substrate using a third mask;
patterning a remaining second metal layer using the fourth photoresist pattern to form a source electrode and a drain electrode;
ashing the fourth photoresist pattern to form a fifth photoresist pattern;
forming a transparent conductive layer on the substrate; and
removing the fifth photoresist pattern overlying the active pattern to form a pixel electrode.
2. The method of claim 1 , wherein the second photoresist pattern corresponding to a channel formation part is relatively thicker than the second photoresist pattern corresponding to the source and drain electrodes.
3. The method of claim 2 , wherein the etch stopper covers the channel formation portion of the active pattern.
4. A method for fabricating an LCD device comprising:
preparing an insulating substrate defined with a thin film transistor part, a data line part, a gate pad part, and a data pad part;
forming a first metal layer and a first photoresist pattern on the insulating substrate using a first mask;
patterning the first metal layer using the first photoresist pattern to form a gate line on the insulating substrate, wherein the gate line includes a gate electrode formed in the thin film transistor part, and a gate pad formed in the gate pad part;
forming an insulating layer, a silicon layer and an etch-stopper layer on the insulating substrate from which the first photoresist pattern are removed;
forming a second photoresist pattern which has a different thickness on the etch-stopper layer using a second mask;
patterning the insulating layer, the silicon layer and the etch-stopper layer using the second photoresist pattern to form an active pattern and a preliminary etch-stopper;
ashing the second photoresist pattern to form a third photoresist pattern;
patterning the preliminary etch-stopper using the third photoresist pattern to form an etch stopper;
forming a data line which includes source and drain electrodes formed in the thin film transistor part, and a data pad formed in the data pad part with a third mask; and
forming a pixel electrode connected with the drain electrode.
5. The method of claim 4 , wherein
the second photoresist pattern corresponding to a channel formation part is relatively thicker than the second photoresist pattern corresponding to the source and drain electrodes and
wherein the second photoresist pattern corresponding to the gate pad part is relatively thicker than the second photoresist pattern corresponding to the data line part and the data pad part.
6. The method of claim 5 , wherein the forming the source and drain electrodes includes:
forming a second metal layer on the insulating substrate including the third photoresist pattern and the etch stopper;
selectively removing the third photoresist pattern with the second metal layer positioned on the third photoresist pattern;
forming a fourth photoresist pattern on the insulating substrate using the third mask, wherein the fourth photoresist pattern has a relatively thinner portion corresponding to the drain electrodes; and,
patterning a remaining second metal layer using the fourth photoresist pattern to form a data line which includes source and drain electrodes formed in the thin film transistor part, and a data pad formed in the data pad part.
7. The method of claim 6 , further comprising patterning the remaining second metal layer with a wet-etching process.
8. The method of claim 6 , further comprising:
forming an ohmic contact layer on the insulating substrate including the third photoresist pattern and the etch stopper before forming the second metal layer.
9. The method of claim 6 , wherein the forming the pixel electrode includes:
forming a fifth photoresist pattern by ashing the fourth photoresist pattern, wherein the fifth photoresist pattern is formed by removing a relatively thinner portion of the fourth photoresist pattern;
forming a transparent conductive layer on the insulating substrate including the fifth photoresist pattern; and
selectively removing the fifth photoresist pattern with the transparent conductive layer positioned on the fifth photoresist pattern to form a pixel electrode.
10. The method of claim 9 , further comprising lifting off the fifth photoresist pattern and the transparent conductive layer.
11. The method of claim 9 , wherein the forming the pixel electrode comprises using the etch stopper as a passivation layer.