Method and apparatus for an over-voltage detection circuit
View Patent ↗A method and apparatus for embedding over-limit voltage detector and recording mechanisms on the silica wafer of integrated circuits to detect, protect and record voltage overages of pre-set voltage limits is presented. A detector circuit and a recorder circuit are placed in series or in parallel on the electrical connections between the integrated circuit devices and the voltage pins connected to outside power sources. When a voltage source is connected and an over-voltage condition is detected, the detector circuit short-circuits the connection while the recorder circuit records the event for later investigation.
1. An apparatus for protecting integrated circuitry from over-voltage events, the apparatus comprising:
an integrated circuit chip, having a connector pin to which a power source may be connected;
a power management device, which regulates the power source; and
an over-voltage even recording mechanism, embedded on the integrated circuit chip, connected between the connector pin and at least one circuit device contained on the integrated circuit chip,
a detector circuit, embedded on the integrated circuit chip, comprising at least one of a circuit breaker and a fuse, of a type of one of either electrical and semiconductor, wherein the detector circuit is adapted to cause a short circuit condition in an over-voltage condition;
wherein the over-voltage event recording mechanism protects the at least one circuit device by causing a short circuit condition on the integrated circuit chip, said short circuit condition causing the at least one of a circuit breaker and a fuse to open, and wherein determination of the short circuit condition is possible through physical observation by viewing the state of at least one of the circuit breaker and the fuse, and
wherein the over-voltage event recording mechanism comprises one or more detector circuits and at least one recording circuit connected in parallel.
2. The apparatus according to claim 1 , wherein the over-voltage event recording mechanism further comprises at least one of:
a recording circuit designed to record the over-voltage event in a medium that information relating to the event can be retrieved at a later time; and
wherein the detector circuit is designed to operate on voltages slightly more than the maximum specified operating voltage of the at least one circuit device on the integrated circuit chip.
3. The apparatus according to claim 1 , wherein the over-voltage event recording mechanism further comprises at least one of:
a memory cell; and
a readable register.
4. The apparatus according to claim 1 , wherein the over-voltage event recording mechanism comprises one or more detector circuits and at least one recording circuit connected in series.
5. The apparatus according to claim 1 , wherein the detector circuit is designed to ignore electrostatic discharge events.
6. The apparatus according to claim 1 , wherein when an over-voltage event has occurred, a determination that such an event occurred can be determined by reading at least one value of a readable register.
7. An apparatus for detecting applied voltages to the connector pins of a telephony device, the apparatus comprising:
at least one detector circuit, designed to allow for voltages across the connector pins from an external power source to an integrated circuit of the telephony device and comprising:
a detector means, embedded on the integrated circuit, for causing a short circuit condition in an over-voltage condition, the detector means comprising at least one of a circuit breaker and a fuse, of a type of one of either electrical and semiconductor, wherein said short circuit condition causes the at least one of said circuit breaker and said fuse to open, wherein determination of the short circuit condition is possible through physical observation by viewing the state of at least one of the circuit breaker and the fuse, and
a means for recording the over-voltage event,
wherein the detector circuit is embedded on the silica wafer of the integrated circuit; and
a power management device, which regulates the external power source, and
wherein the over-voltage event recording means comprises one or more detector circuits and at least one recording circuit connected in parallel.
8. The apparatus according to claim 7 , wherein the means for recording the over-voltage event comprises at least one of:
a memory cell; and
a readable register.
9. The apparatus according to claim 7 , wherein the at least one detector circuit is designed to operate on voltages slightly more than the maximum specified operating voltage of at least one circuit device on the integrated circuit of the telephony device.
10. The apparatus according to claim 7 , wherein the at least one detector circuit is designed to record the over-voltage event in a medium that information relating to the event can be retrieved at a later time.
11. The apparatus according to claim 7 , wherein the at least one detector circuit is designed to ignore electrostatic discharge events.
12. The apparatus according to claim 7 , wherein when an over-voltage even has occurred, a determination that such an event occurred can be determined by reading at least one value of a readable register.
13. The apparatus according to claim 7 , wherein the integrated circuit of the telephony device is one of a digital integrated circuit, an analog digital circuit a mixed signal integrated circuit and a memory device integrated circuit.