IP Library Granted Patent US 7,688,373
Granted Patent B2
US 7,688,373 · App. 11/529,256 · Granted Mar 30, 2010

Solid-state imaging device with specific contact arrangement

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Quick Facts
Patent No.
US 7,688,373
App. No.
11/529,256
Granted
Mar 30, 2010
Kind
B2
Abstract

In each photosensitive cell, a photodiode 101 , a transfer gate 102 , a floating diffusion layer section 103 , an amplifier transistor 104 , and a reset transistor 105 are formed in one active region surrounded by a device isolation region. The floating diffusion layer section 103 included in one photosensitive cell is connected not to the amplifier transistor 104 included in that cell but to the gate of the amplifier transistor 104 included in another photosensitive cell adjacent to the one photosensitive cell in the column direction. A polysilicon wire 111 connects the transfer gates 102 arranged in the same row, and a polysilicon wire 112 connects the reset transistors 105 arranged in the same row. For connection in the row direction, only polysilicon wires are used.

Claims (82)

1. A solid-state imaging device comprising:

a photosensitive region having cells two-dimensionally arranged in row and column directions on a semiconductor substrate, each of the cells including a photodiode, a transfer transistor, a floating diffusion layer, an amplifier transistor, and a reset transistors

a power supply line commonly connected to drains of said amplifier transistors; and

a plurality of vertical signal lines each commonly connected to said amplifier transistors arranged in a same column, wherein:

the floating diffusion layer included in a given one of the cells is connected to a gate of an amplifier transistor included in a cell adjacent to the given cell in a direction other than the row direction,

in each cell, the floating diffusion layer and the reset transistor share a portion in an active region, and the amplifier transistor and the reset transistor share another portion in the active region,

the power supply line and the vertical signal lines are made of a same wiring material,

a first contact is provided on the floating diffusion layer so as to connect the floating diffusion layer with a gate of the amplifier transistor,

a second contact is connected to the power supply line,

a third contact is connected to the vertical signal line and

the first contact, the second contact, and the third contact are aligned substantially in a straight line.

2. The solid-state imaging device according to claim 1 ,

wherein

the power supply line and the vertical signal lines are formed in a same metal wire layer.

3. The solid-state imaging device according to claim 1 ,

wherein

the power supply line and the vertical signal lines are arranged in parallel to each other.

4. The solid-state imaging device according to claim 1 , further comprising:

a signal line connecting the floating diffusion layer and a gate of the amplifier transistor, and

wherein

the signal line and the vertical signal lines are formed in a same metal wire layer.

5. The solid-state imaging device according to claim 1 , further comprising:

a signal line connecting the floating diffusion layer and a gate of the amplifier transistor,

wherein

the signal line and the vertical signal lines are made of a same wiring material.

6. The solid-state imaging device according to claim 1 , further comprising:

a signal line connecting the floating diffusion layer and a gate of the amplifier transistor,

wherein

the signal line and the vertical signal lines are arranged in parallel to each other.

7. The solid-state imaging device according to claim 1 , further comprising:

a signal line connecting a given one of said floating diffusion layers with a gate of a corresponding one of the amplifier transistors, wherein

the signal line, the power supply line, and the vertical signal lines are formed in a same metal wire layer.

8. The solid-state imaging device according to claim 1 , further comprising:

a signal line connecting a given one of said floating diffusion layers with a gate of a corresponding one of the amplifier transistors, wherein

the power supply line includes a plurality of vertical power supply lines each commonly connected to drains of the amplifier transistors arranged on the same column, and

the signal line is located between one of the vertical signal lines which is connected to the amplifier transistor included in one of the cells which includes the given floating diffusion layer and one of the vertical power supply lines which is connected to a drain of the corresponding amplifier transistor.

9. The solid-state imaging device according to claim 1 , wherein:

a fourth contact is provided on a wiring area where the gate of the amplifier transistor is located so as to connect the floating diffusion layer with the gate of the amplifier transistor, and

the first contact, the second contact, the third contact, and the fourth contact are aligned substantially in a straight line.

10. A solid-state imaging device comprising:

a photosensitive region having cells two-dimensionally arranged in row and column directions on a semiconductor substrate, each of the cells including a photodiode, a transfer transistor, a floating diffusion layer, an amplifier transistor, and a reset transistor;

a plurality of first horizontal signal lines each commonly connected to gate electrodes of said transfer transistors arranged in a same row;

a plurality of second horizontal signal lines each commonly connected to gate electrodes of said reset transistors arranged in a same row;

a power supply line commonly connected to drains of said amplifier transistors; and

a plurality of vertical signal lines each commonly connected to said amplifier transistors arranged in a same column, wherein:

the first and second horizontal signal lines are made of a same material,

the floating diffusion layer included in a given one of the cells is located between the first horizontal signal line connected to a gate electrode of the transfer transistor included in the given one of the cells and the second horizontal signal line connected to a gate electrode of the reset transistor included in the given cell,

the floating diffusion layer included in a given one of the cells is connected to a gate of an amplifier transistor included in a cell adjacent to the given cell in a direction other than the row direction,

in each cell, the floating diffusion layer and the reset transistor share a portion in an active region, and the amplifier transistor and the reset transistor share another portion in the active region,

the power supply line and the vertical signal lines are made of a same wiring material,

a first contact is provided on the floating diffusion layer so as to connect the floating diffusion layer with a gate of the amplifier transistor,

a second contact is connected to the power supply line,

a third contact is connected to the vertical signal line, and

the first contact, the second contact, and the third contact are aligned substantially in a straight line.

11. The solid-state imaging device according to claim 10 ,

wherein

the power supply line and the vertical signal lines are formed in a same metal wire layer.

12. The solid-state imaging device according to claim 10 ,

wherein

the power supply line and the vertical signal lines are arranged in parallel to each other.

13. The solid-state imaging device according to claim 10 , further comprising:

a signal line connecting the floating diffusion layer and a gate of the amplifier transistor,

wherein

the signal line and the vertical signal lines are formed in a same metal wire layer.

14. The solid-state imaging device according to claim 10 , further comprising:

a signal line connecting the floating diffusion layer and a gate of the amplifier transistor,

wherein

the signal line and the vertical signal lines are made of a same wiring material.

15. The solid-state imaging device according to claim 10 , further comprising:

a signal line connecting the floating diffusion layer and a gate of the amplifier transistor,

wherein

the signal line and the vertical signal lines are arranged in parallel to each other.

16. The solid-state imaging device according to claim 10 , further comprising:

a signal line connecting a given one of said floating diffusion layers with a gate of a corresponding one of the amplifier transistors, wherein

the signal line, the power supply line, and the vertical signal lines are formed in a same metal wire layer.

17. The solid-state imaging device according to claim 10 , further comprising:

a signal line connecting a given one of said floating diffusion layers with a gate of a corresponding one of the amplifier transistors, wherein

the power supply line includes a plurality of vertical power supply lines each commonly connected to drains of the amplifier transistors arranged on the same column, and

the signal line is located between one of the vertical signal lines which is connected to the amplifier transistor included in one of the cells which includes the given floating diffusion layer and one of the vertical power supply lines which is connected to a drain of the corresponding amplifier transistor.

18. The solid-state imaging device according to claim 10 , wherein:

a fourth contact is provided on a wiring area where the gate of the amplifier transistor is located so as to connect the floating diffusion layer with the gate of the amplifier transistor, and

the first contact, the second contact, the third contact, and the fourth contact are aligned substantially in a straight line.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 26, 2014
From: PANASONIC CORPORATION
To: COLLABO INNOVATIONS, INC.
Reel/Frame 033021/0806 →
LIEN Recorded Jan 13, 2014
From: COLLABO INNOVATIONS, INC.
To: PANASONIC CORPORATION
Reel/Frame 031997/0445 →