Method for fabricating semiconductor element

1. A method for fabricating a semiconductor element, comprising:

providing a semiconductor wafer;

forming an oxide layer on the semiconductor wafer;

carrying out a high-temperature thermal treatment to the semiconductor wafer at least once, wherein the high-temperature thermal treatment comprises a final high-temperature treatment, which is carried out lastly among all high temperature thermal treatments in a process of fabricating the semiconductor element as the high-temperature thermal treatment and which is carried out in a furnace at a temperature that is over 700° C.;

lowering the temperature of the semiconductor wafer, following the final high-temperature treatment, to a predetermined lower temperature, which is 700° C. or less while in the furnace and in an inert atmosphere consisting essentially of at least one inert gas; and

exposing the semiconductor wafer to an oxidizing atmosphere after the temperature lowering process.

2. The method for fabricating a semiconductor element according to claim 1 , wherein the high-temperature thermal treatment is carried out plural times.

3. The method for fabricating a semiconductor element according to claim 1 , wherein the final high-temperature treatment is carried out at a temperature that is over 1000° C.

4. The method for fabricating a semiconductor element according to claim 1 , wherein the predetermined lower temperature is lower than 600° C.

5. The method for fabricating a semiconductor element according to claim 1 , wherein the final high-temperature treatment is carried out intentionally to reduce electric charge trapped between the oxide layer and the semiconductor wafer regardless of location of the semiconductor wafer in the furnace.

6. The method for fabricating a semiconductor element according to claim 1 , wherein the semiconductor wafer is left in a furnace after the final high-temperature treatment is finished until the semiconductor wafer becomes the predetermined lower temperature without any specific temperature control.

7. The method for fabricating a semiconductor element according to claim 1 , wherein the semiconductor element comprises a resistive element.

8. A method for fabricating a resistive element on a semiconductor wafer, comprising:

providing a semiconductor wafer;

forming a screen oxide layer on the semiconductor wafer;

forming a diffusion layer on the semiconductor wafer by a first annealing process;

loading the semiconductor wafer into a furnace;

carrying out a final high-temperature thermal treatment, which is carried out lastly among all high-temperature thermal treatments in a process of fabricating the resistive element as a high-temperature thermal treatment in the furnace and at a temperature that is over 700° C.;

lowering the temperature of the semiconductor wafer in the furnace, following the final high-temperature treatment, to a predetermined lower temperature, which is 700° C. or less, while in the furnace and in an inert atmosphere consisting essentially of at least one inert gas; and

unloading the semiconductor wafer from the furnace after the temperature lowering process.

9. The method for fabricating a resistive element on a semiconductor wafer according to claim 8 , wherein the high-temperature thermal treatment is carried out plural times.

10. The method for fabricating a resistive element on a wafer according to claim 8 , wherein the final high-temperature treatment is carried out at a temperature that is over 1000° C.

11. The method for fabricating a resistive element on a semiconductor wafer according to claim 8 , wherein the predetermined lower temperature is lower than 600° C.

12. The method for fabricating a resistive element on a semiconductor wafer according to claim 8 , wherein the final high-temperature treatment is carried out intentionally to reduce electric charge trapped between the oxide layer and the semiconductor wafer regardless of location of the semiconductor wafer in the furnace.

13. The method for fabricating a resistive element on a semiconductor wafer according to claim 8 , wherein the semiconductor wafer is left in the furnace after the final high-temperature treatment is finished until the semiconductor wafer achieves the predetermined lower temperature without any specific temperature control.