High fill-factor sensor with reduced coupling
View Patent ↗A photosensor array includes data and scan lines ( 124, 148 ), circuitry of each data line/scan line pair formed in a backplane ( 110 ) on a substrate ( 102 ). On a first electrode scan line ( 148 ) a switching element ( 112 ) responds to a scan signal, connecting a first terminal ( 106 ) to a second terminal ( 108 ). A front plane ( 120 ) has sensing elements ( 122 ) indicating a measure of a received stimulus and including a charge collection electrode ( 130 ). An insulating layer ( 140 ) disposed between the backplane ( 110 ) and the front plane ( 120 ) contains at least a first via ( 136 ) connecting the first terminal ( 108 ) of the switching element ( 112 ) in the backplane ( 110 ) to a charge collection electrode ( 130 ) of the sensing element ( 122 ) in the front plane ( 120 ). A second via ( 126 ) connects between the second terminal ( 108 ) of the switching element ( 112 ) and the data line ( 124 ).
1. A photo-sensor array including a plurality of pixel sensing circuits, each pixel sensing circuit comprising:
a backplane comprising:
(i) a substrate;
(ii) a gate electrode formed on the substrate and connected with a scan line common to a plurality of the pixel sensing circuits; and
(iii) a switching element comprising a first terminal and a second terminal, the switching element communicating with the gate electrode to respond to a scan signal from the scan line by electrically connecting the first terminal to the second terminal to provide a first electric signal to pass between the first terminal and the second terminal;
an insulating layer disposed on the backplane;
a front plane comprising a plurality of layers deposited sequentially from a first side of the front plane proximate the backplane, the plurality of layers forming:
(i) a sensing element comprising one or more of the plurality of layers and including a charge collection electrode, the sensing element disposed over the first terminal of the switching element, the sensing element receiving a stimulus and providing a second electric signal indicating a measure of the received stimulus; and
(ii) a data electrode disposed over the second terminal of the switching elements and comprising at least one of the plurality of layers distinct from the one or more of the plurality of layers comprising the sensing elements, the at least one of the plurality of layers comprising the data electrode deposited after deposition of all of the plurality of layers comprising the sensing element, the data electrode connected with a data line common to a plurality of pixel sensing circuits;
a first via disposed through the insulating layer and forming an electrical connection between the first terminal of the switching element in the backplane and the charge collection electrode of the sensing element in the front plane; and
a second via disposed through the insulating layer and forming an electrical connection between the second terminal of the switching element in the backplane and the data electrode in the front plane.
2. The array of claim 1 in which the switching element is a thin film transistor (TFT) comprising:
a) the gate electrode electrically connected to the scan line;
b) an insulator formed over the gate electrode;
c) an amorphous silicon layer formed over the insulator;
d) two or more n+ doped regions formed over the amorphous silicon layer; and
e) metal electrodes contacting the n+ doped regions forming the first and second terminals.
3. The array of claim 1 in which the sensing element is a photodiode comprising:
a) an n+ layer formed over the charge collection electrode;
b) an amorphous silicon layer formed over the n+ layer;
c) a p+ layer formed over the amorphous silicon layer; and
d) a conductive layer formed over the p+ layer.
4. The array of claim 1 in which the sensing element is a photodiode comprising:
a) a bias electrode;
b) a p+ layer formed over the bias electrode;
c) an amorphous silicon layer formed over the p+ layer;
d) a n+ layer formed over the amorphous silicon layer; and
e) wherein the charge collection electrode is formed over the n+ layer.
5. The array of claim 1 in which the sensing element is a metal-insulator-semiconductor (MIS) photosensor comprising:
a) a dielectric formed over the charge collection electrode;
b) an amorphous silicon layer formed over the dielectric; and
c) an n+ layer formed over the amorphous silicon layer, and wherein the pixel sensing circuit further comprises:
a bias electrode.
6. The array of claim 1 in which the sensing element is a metal-insulator-semiconductor (MIS) photosensor comprising:
a) a bias electrode;
b) a gate dielectric formed over the bias electrode;
c) an amorphous silicon layer formed over the gate dielectric;
d) an n+ layer formed over the amorphous silicon layer; and
e) the charge collection electrode.
7. The array of claim 1 in which the insulating layer is comprised of benzo-cyclo-butene.
8. The array of claim 1 in which the insulating layer is comprised of polyimide.
9. The array of claim 1 in which the insulating layer is comprised of sol-gel.
10. The array of claim 1 in which the data-line is comprised of aluminum of at least 0.5 micron thickness.
11. The array of claim 1 in which the data-line is comprised of a stack of metal layers, at least one of which is aluminum of at least 0.5 microns thickness.
12. The array of claim 1 in which the data-line is comprised of copper of 0.5 microns thickness.
13. The array of claim 1 in which the data-line is comprised of a stack of metal layers, at least one of which is copper of at least 0.5 micron thickness.
14. The array of claim 1 in which a colorant is contained within the insulating layer to prevent light from penetrating to the backplane.
15. The array of claim 14 wherein said colorant is a dye, pigment, or carbon.
16. The array of claim 1 wherein the insulating layer is acrylic.
17. The array of claim 1 , wherein the thickness of the insulating layer is at least 2 microns.
18. The array of claim 1 , wherein the substrate is stainless steel.
19. A method of fabricating a photo-sensor array on a substrate comprising:
(a) forming a backplane by forming an electrode scan line disposed over the substrate and forming a switching element responsive to a scan signal on the electrode scan line by electrically connecting a first terminal to a second terminal;
(b) depositing an insulating layer over the backplane, the insulating layer patterned to include a first via corresponding to the first terminal of the switching element and a second via corresponding to the second terminal of the switching element; and
(c) forming a front plane after depositing the insulating layer, the front plane comprising one or more sensing elements providing a sensor signal corresponding to the amount of received light at a charge collection electrode and in communication with the first terminal of the switching element through the first via in the insulating layer; forming a data line subsequent to forming the one or more sensing elements in communication with the second terminal of the switching element through the second via in the insulating layer; and forming a bias line for providing a bias charge to the one or more sensing element.
20. A photo-sensor array having array circuitry that includes data lines and scan lines and, for each data line/scan line pair, cell circuitry; the cell circuitry of each data line/scan line pair comprising:
a switching element for responding to a scan signal from a scan line by electrically connecting a first terminal to a second terminal to provide a first electric signal to pass between the first terminal and the second terminal;
a first electrode contacting the first terminal;
a photosensitive layer overlying the first electrode and having a void proximate the second terminal; and
a data line disposed in the void of the photosensitive layer and contacting the second terminal, the data line being formed after the photosensitive layer.
21. The array of claim 1 , wherein the data line is made of aluminum.