IP Library Granted Patent US 7,439,611
Granted Patent B2
US 7,439,611 · App. 11/534,288 · Granted Oct 21, 2008

Circuit board with auxiliary wiring configuration to suppress breakage during bonding process

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Quick Facts
Patent No.
US 7,439,611
App. No.
11/534,288
Granted
Oct 21, 2008
Kind
B2
Abstract

A circuit board including a flexible insulating substrate, a plurality of conductive wirings placed in line on the flexible insulating substrate, and bumps provided at end portions of the respective conductive wirings positioned in a region for mounting a semiconductor chip is provided. The circuit board further includes an auxiliary conductive wiring positioned at an outermost corner of the region for mounting the semiconductor chip, being adjacent to and an outside the outermost conductive wiring, and an auxiliary bump formed on the auxiliary conductive wiring in line with the bumps on the conductive wirings. One end portion of the auxiliary conductive wiring is terminated at a position in the outside vicinity of the auxiliary bump in an outward direction of the region for mounting the semiconductor chip, and the auxiliary conductive wiring is bent at the other end portion positioned inside the auxiliary bump in an inward direction of the region for mounting the semiconductor chip, and connected to an end of the adjacent outermost conductive wiring. A break in the outermost conductive wiring, which is caused by concentrated stress at the time of joining the bumps of the circuit board and electrode pads of the semiconductor chip, can be suppressed.

Claims (11)

1. A circuit board comprising:

a flexible insulating substrate,

a plurality of conductive wirings formed in line on the flexible insulating substrate, and

bumps provided at the end portions of the respective conductive wirings positioned in a region for mounting a semiconductor chip, on which the semiconductor chip can be mounted by bonding electrode terminals formed on the semiconductor chip to the bumps;

the circuit board further comprising:

an auxiliary conductive wiring positioned at an outermost corner of the region for mounting the semiconductor chip, being adjacent to and outside the outermost conductive wiring, and

an auxiliary bump formed on the auxiliary conductive wiring in line with the bumps on the conductive wirings, wherein

one end portion of the auxiliary conductive wiring is terminated at a position in the outside vicinity of the auxiliary bump in an outward direction of the region for mounting the semiconductor chip, and

the auxiliary conductive wiring is bent at the other end portion positioned inside the auxiliary bump in an inward direction of the region for mounting the semiconductor chip, and connected to an end of an adjacent outermost conductive wiring.

2. The circuit board according to claim 1 , wherein the auxiliary conductive wiring is terminated at a position outside the auxiliary bump, with a length beyond the auxiliary bump being more than 0 μm and less than 300 μm.

3. The circuit board according to claim 1 , wherein a dummy conductive wiring is provided along extension from the end of the auxiliary conductive wiring in an outward direction of the region for mounting the semiconductor chip, the dummy conductive wiring being discontinuous from the auxiliary conductive wiring.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 27, 2020
From: PANASONIC CORPORATION
To: PANASONIC SEMICONDUCTOR SOLUTIONS CO., LTD.
Reel/Frame 052755/0917 →
CHANGE OF NAME Recorded Mar 18, 2020
From: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
To: PANASONIC CORPORATION
Reel/Frame 052184/0943 →