Method for fabricating a semiconductor device

1. A method of fabricating a power semiconductor device, comprising:

providing a conductive substrate;

growing a III-nitride transition layer over a major surface of said substrate by growing at least a first III-nitride layer using a first growth method selected from the group consisting of MBE, HVPE, and MOCVD, and at least a second III-nitride layer over said at least first III-nitride layer using a second growth method selected from said group, said second growth method being distinct and different from said first growth method, and at least a third III-nitride layer over said second III-nitride layer;

growing a plurality of said first, second, and third III-nitride layers in an arrangement where a sequence of said first, second, and third III-nitride layers does not repeat; and

forming an active semiconductor region on said transition layer, said active semiconductor region including a thick III-nitride semiconductor layer, wherein said first and second III-nitride layers each act to transition lattice mismatch and differences in the thermal expansion characteristics between said conductive substrate and said thick III-nitride semiconductor layer.

2. The method of claim 1 , wherein said substrate is comprised of silicon.

3. The method of claim 1 , wherein said substrate is comprised of silicon carbide.

4. The method of claim 1 , wherein said first method is MBE and said second method is HVPE.

5. The method of claim 1 , wherein said first method is MBE and said second method is MOCVD.

6. The method of claim 1 , wherein said first method is HVPE and said second method is MBE.

7. The method of claim 1 , wherein said first method is HVPE and said second method is MOCVD.

8. The method of claim 1 , wherein said first method is MOCVD and said second method is HVPE.

9. The method of claim 1 , wherein said first method is MOCVD and said second method is MBE.

10. The method of claim 1 , further comprising growing said third III-nitride layer over said second III-nitride layer using a third growth method.

11. The method of claim 10 , wherein said first growth method is MBE, said second growth method is HVPE, and said third growth method is MOCVD.

12. The method of claim 10 , wherein said first growth method is MBE, said second growth method is MOCVD, and said third growth method is HVPE.

13. The method of claim 10 , wherein said first growth method is HVPE, said second growth method is MBE, and said third growth method is MOCVD.

14. The method of claim 10 , wherein said first growth method is HVPE, said second growth method is MCVD, and said third growth method is MBE.

15. The method of claim 10 , wherein said first growth method is MOCVD, said second growth method is HVPE, and said third growth method is MBE.

16. The method of claim 10 , wherein said first growth method is MOCVD, said second growth method is MBE, and said third growth method is HVPE.

17. The method of claim 10 , comprising a plurality first III-nitride layers, a plurality of second III-nitride layers, and a plurality of third III-nitride layers, wherein said first, said second, and said third III-nitride layers are alternately arranged.

18. The method of claim 10 , wherein a composition of said first III-nitride layer is different from a composition of said second III-nitride layer and from a composition of said third III-nitride layer, and a composition of said second III-nitride layer is different from a composition of said third III-nitride layer.

19. The method of claim 1 , wherein said III-nitride transition layer comprises AIN.

20. The method of claim 1 , wherein a composition of said transition layer is uniform through a thickness thereof.

21. The method of claim 1 , wherein a composition of said transition layer is graded through a thickness thereof.

22. The method of claim 1 , wherein a composition of said first III-nitride layer is different from a composition of said second III-nitride layer.