IP Library Granted Patent US 7,506,096
Granted Patent B1
US 7,506,096 · App. 11/538,444 · Granted Mar 17, 2009

Memory segment emulation model for virtual machine

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Quick Facts
Patent No.
US 7,506,096
App. No.
11/538,444
Granted
Mar 17, 2009
Kind
B1
Abstract

A method of emulating segment addressing by a processor that includes initiating a Virtual Machine Monitor in a kernel mode; initiating a Virtual Machine in a user mode; forming a dynamically mapped table in Virtual Machine Monitor space, the dynamically mapped table corresponding to a table of segment descriptors of the Virtual Machine; populating the dynamically mapped table with descriptors that raise exceptions upon an attempt by the Virtual Machine to address a corresponding segment; and mapping a descriptor to the dynamically mapped table upon the Virtual Machine's use of that descriptor.

Claims (32)

1. A system for managing memory in a computer running a Virtual Machine, the system comprising:

a host operating system having kernel mode privileges;

a Virtual Machine having user mode privileges and having a guest table identifying memory segments; and

a Virtual Machine Monitor having kernel mode privileges and that maintains a dynamically mapped table of pointers to segments identified by the guest table,

wherein the computer uses the dynamically mapped table to address Virtual Machine memory.

2. The system of claim 1 , wherein the Virtual Machine Monitor maintains a plurality of dynamically mapped tables of pointers, each table corresponding to a particular privilege level of the processor.

3. The system of claim 2 , wherein a segment virtualization model uses one set of tables and other dynamically mapped tables correspond to pointer mapping emulation model of segment-based memory addressing.

4. The system of claim 1 , wherein an exception handler is invoked to handle an attempt to use an unmapped pointer.

5. The system of claim 1 , wherein the dynamically mapped table is initialized with pointers that point to Not Present segments.

6. The system of claim 5 , wherein entries to the dynamically mapped table are added only when the Virtual Machine attempts to use a corresponding segment.

7. The system of claim 1 , entries to the dynamically mapped table are added only when the Virtual Machine attempts to use a corresponding segment.

8. The system of claim 1 , wherein the guest table includes a global descriptor table used by guest operating system code of the Virtual Machine, and a local descriptor used by user application code of the Virtual Machine, and wherein the dynamically mapped table includes a first corresponding table with dynamically mapped global descriptors and a second corresponding table with dynamically mapped local descriptors.

9. The system of claim 1 , wherein the Virtual Machine uses the local descriptor table for user application only, and the Virtual Machine's LDT can be loaded directly to the real processor.

10. The system of claim 1 , wherein the Virtual Machine's operations affecting segment registers are executed in a native mode.

11. The system of claim 1 , wherein the Virtual Machine's operations affecting the guest table are executed in a native mode.

12. The system of claim 1 , wherein the dynamically mapped table is mapped on a page-wise basis.

13. The system of claim 1 , wherein the pointers in the dynamically mapped table have no higher privilege than corresponding pointers in the guest table.

14. A method of emulating segment addressing by a processor, comprising:

initiating a Virtual Machine Monitor in a kernel mode;

initiating a Virtual Machine in a user mode;

forming a dynamically mapped table in Virtual Machine Monitor space, the dynamically mapped table corresponding to a table of segment descriptors of the Virtual Machine;

populating the dynamically mapped table with descriptors that raise exceptions upon an attempt by the Virtual Machine to address a corresponding segment; and

mapping a descriptor to the dynamically mapped table upon the Virtual Machine's use of that descriptor.

15. The method of claim 14 , wherein the Virtual Machine Monitor maintains a plurality of dynamically mapped tables of pointers, each table corresponding to a particular privilege level of the processor.

16. The method of claim 14 , wherein an exception handler is invoked to handle an attempt to use an unmapped pointer.

17. The method of claim 14 , wherein the dynamically mapped table is initialized with pointers that point to Not Present segments.

18. The method of claim 17 , wherein entries to the dynamically mapped table are added only when the Virtual Machine attempts to use a corresponding segment.

19. The method of claim 14 , wherein the guest table includes a global descriptor table used by guest operating system code of the Virtual Machine, and a local descriptor used by user application code of the Virtual Machine, and wherein the dynamically mapped table includes a first corresponding table with dynamically mapped global descriptors and a second corresponding table with dynamically mapped local descriptors.

20. The method of claim 14 , wherein the Virtual Machine's operations affecting segment registers are executed in a native mode.

21. The method of claim 14 , wherein the Virtual Machine's operations affecting the guest table are executed in a native mode.

22. The method of claim 14 , wherein the dynamically mapped table is mapped on a page-wise basis.

23. The method of claim 14 , wherein the pointers in the dynamically mapped table have no higher privilege than corresponding pointers in the guest table.

Assignments (12)
RELEASE OF SECURITY INTEREST Recorded Jul 18, 2019
From: UBS AG, STAMFORD BRANCH, AS ADMINISTRATIVE AND COLLATERAL AGENT
To: COREL CORPORATION; CLEARSLIDE, INC.; PARALLELS INTERNATIONAL GMBH
Reel/Frame 049787/0073 →
RELEASE OF SECURITY INTEREST RECORDED AT : REEL 047973 FRAME 0797 Recorded Jul 17, 2019
From: UBS AG, STAMFORD BRANCH
To: PARALLELS INTERNATIONAL GMBH
Reel/Frame 049773/0590 →
SECURITY INTEREST Recorded Dec 21, 2018
From: PARALLELS INTERNATIONAL GMBH
To: UBS AG, STAMFORD BRANCH
Reel/Frame 047973/0797 →
MERGER Recorded Mar 6, 2018
From: PARALLELS IP HOLDINGS GMBH
To: PARALLELS INTERNATIONAL GMBH
Reel/Frame 045122/0592 →
RELEASE OF SECURITY INTEREST Recorded Dec 14, 2015
From: SILICON VALLEY BANK
To: PARALLELS SOFTWARE INTERNATIONAL, INC.
Reel/Frame 037287/0638 →
RELEASE OF SECURITY INTEREST Recorded Dec 14, 2015
From: SILICON VALLEY BANK
To: PARALLELS HOLDINGS LTD. (F/K/A SWSOFT HOLDINGS LTD.)
Reel/Frame 037289/0685 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 25, 2012
From: PARALLELS HOLDINGS, LTD.
To: PARALLELS IP HOLDINGS GMBH
Reel/Frame 027595/0187 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 31, 2011
From: PARALLELS SOFTWARE INTERNATIONAL, INC.
To: PARALLELS HOLDINGS, LTD.
Reel/Frame 027467/0328 →
SECURITY AGREEMENT Recorded Jun 23, 2011
From: PARALLELS HOLDINGS LTD. (F/K/A SWSOFT HOLDINGS LTD.)
To: SILICON VALLEY BANK
Reel/Frame 026480/0957 →
SECURITY AGREEMENT Recorded Apr 3, 2010
From: PARALLELS HOLDINGS, LTD.
To: SILICON VALLEY BANK
Reel/Frame 024170/0853 →
SECURITY AGREEMENT Recorded Nov 26, 2007
From: PARALLELS SOFTWARE INTERNATIONAL, INC.
To: SILICON VALLEY BANK
Reel/Frame 020154/0915 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 24, 2006
From: KORYAKIN, ALEXEY B.; DOBROVOLSKIY, NIKOLAY N.; OMELYANCHUK, ANDREY A.; TORMASOV, ALEXANDER G.; BELOUSSOV, SERGUEI M.; PROTASSOV, STANISLAV S.
To: PARALLELS SOFTWARE INTERNATIONAL, INC.
Reel/Frame 018430/0116 →