Semiconductor device including fully-silicided (FUSI) gate electrodes
View Patent ↗A semiconductor device includes: an isolation region formed in a semiconductor substrate; an active region surrounded by the isolation region in the semiconductor substrate; a gate insulating film formed on the active region; and a gate electrode formed across the boundary between the active region and the isolation region adjacent to the active region. The gate electrode includes a first portion which is located above the active region with the gate insulating film interposed therebetween and is entirely made of a silicide in a thickness direction and a second portion which is located above the isolation region and is made of a silicon region and the silicide region covering the silicon region.
1. A semiconductor device, comprising:
an isolation region formed in a semiconductor substrate;
an active region surrounded by the isolation region in the semiconductor substrate;
a gate insulating film formed on the active region; and
a gate electrode formed across the boundary between the active region and the isolation region adjacent to the active region,
wherein the gate electrode includes a first portion which is located above the active region with the gate insulating film interposed therebetween and is entirely made of a silicide region in a thickness direction and a second portion which is located above the isolation region and is made of a silicon region and the silicide region covering the silicon region, and
the silicon region is formed only above the isolation region.
2. The semiconductor device of claim 1 , wherein the silicon region is located above the isolation region and is apart from the boundary between the active region and the isolation region.
3. The semiconductor device of claim 1 , wherein the silicon region is formed across a portion above the active region.
4. The semiconductor device of claim 1 , wherein the length in a gate length direction of the second portion of the gate electrode is larger than that of the first portion of the gate electrode.
5. The semiconductor device of claim 1 , wherein the length in a gate length direction of the first portion of the gate electrode is equal to that of the second portion of the gate electrode.
6. The semiconductor device of claim 1 , wherein the second portion of the gate electrode is a contact region.
7. The semiconductor device of claim 1 , wherein the silicon region is made of one of polysilicon and amorphous silicon.
8. The semiconductor device of claim 1 , wherein the silicide region is made of nickel silicide.
9. The semiconductor device of claim 1 , wherein the gate insulating film is made of a high-dielectric-constant film.
10. The semiconductor device of claim 1 , wherein the gate insulating film is made of a high-K film.
11. The semiconductor device of claim 10 , wherein the high-K film is made of hafnium oxide, hafnium silicate or HfSiON.
12. The semiconductor device of claim 1 , wherein the silicide region is made of nickel silicide.
13. The semiconductor device of claim 1 , wherein
an end portion of the gate electrode formed above the isolation region is wider, in a gate length direction, than the other portion of the gate electrode located above the active region, and
the silicon region is formed only on the end portion of the gate electrode formed above the isolation region.