Manufacturing method of thin-film transistor, thin-film transistor sheet, and electric circuit
View Patent ↗A thin-film transistor, a thin-film transistor sheet, an electric circuit, and a manufacturing method thereof are disclosed, the method comprising the steps of forming a semiconductor layer by providing a semiconductive material on a substrate, b) forming an insulating area, which is electrode material-repellent, by providing an electrode material-repellent material on the substrate, and c) forming a source electrode on one end of the insulating area and a drain electrode on the other end of the insulating area, by providing an electrode material.
1. A method of manufacturing a thin-film transistor comprising a substrate, a gate electrode, a gate insulating layer, a semiconductor layer, a source electrode and a drain electrode, the method comprising the steps of:
a) forming the semiconductor layer by providing a semiconductive material over the substrate;
b) forming an insulating area, which is electrode material-repellent, by providing an electrode material-repellent material over the substrate; and
c) forming a source electrode and a drain electrode by providing an electrode material onto the insulating area, whereby the provided electrode material separates into at least two parts and makes the source electrode on one end of the insulating area and the drain electrode on the other end of the insulating area, wherein the source electrode and the drain electrode are in contact with the semiconductor layer.
2. The method of claim 1 , further comprising the step of forming an ink receptive layer on the substrate before the formation of the insulating area, wherein the insulating area is formed in the ink receptive layer on the substrate.
3. The method of claim 1 , wherein the providing of the semiconductive material is carried out by an ink jet method.
4. The method of claim 1 , wherein formation of the insulating area is carried out by providing a light sensitive layer on the substrate, providing an electrode material-repellent insulating layer on the light sensitive layer, exposing the resulting material and developing the exposed material.
5. The method of claim 4 , wherein the exposing is carried out employing laser.
6. The method of claim 4 , wherein the light sensitive layer is an ablation layer.
7. The method of claim 1 , wherein after the semiconductor layer has been formed, an ink receptive layer is provided on the resulting semiconductor layer, and then the insulating area is formed in the ink receptive layer on the semiconductor layer.
8. The method of claim 1 , wherein after the semiconductor layer has been formed, an intermediate layer is provided on the semiconductor layer so as to protect the resulting semiconductor layer, and then the insulating area is formed on the intermediate layer.
9. The method of claim 1 , wherein the thin-film transistor comprises the substrate, the gate electrode and the gate insulating layer in this order.
10. The method of claim 1 , wherein the thin-film transistor comprises the substrate, the gate electrode, the gate insulating layer, the semiconductor layer and the insulating layer in this order.
11. A method of manufacturing a thin-film transistor sheet comprising a gate busline, a source busline, and plural thin-film transistors comprising a substrate, a gate electrode, a gate insulating layer, a semiconductor layer, a source electrode and a drain electrode, the plural thin-film transistors being connected with each other through the gate busline and the source busline, the method comprising the steps of:
a) forming the semiconductor layer by providing a semiconductive material over the substrate;
b) forming an insulating area, which is electrode material-repellent, by providing an electrode material-repellent material over the substrate; and
c) forming a source electrode and a drain electrode, by providing an electrode material onto the insulating area whereby the provided electrode material separates into at least two parts and makes the source electrode on one end of the insulating area and the drain electrode on the other end of the insulating area, wherein the source electrode and the drain electrode are in contact with the semiconductor layer.
12. The method of claim 11 , wherein the insulating area is comprised of a silicone rubber layer.
13. The method of claim 11 , wherein the thickness of the insulating area is from 0.5 to 10 μm.
14. The method of claim 11 , wherein the providing of the electrode material-repellent material is carried out by an ink jet method.
15. The method of claim 11 , further comprising the step of forming an ink receptive layer on the substrate before the formation of the insulating area, wherein the insulating area is formed in the ink receptive layer on the substrate.
16. The method of claim 11 , wherein the providing of the semiconductive material is carried out by an ink jet method.
17. The method of claim 11 , wherein the providing of the electrode material is carried out by an ink jet method.
18. The method of claim 17 , wherein the electrode material is contained in a solvent or a dispersion medium containing 50% by weight of water.
19. The method of claim 11 , wherein formation of the insulating area is carried out by providing a light sensitive layer on the substrate, providing an electrode material-repellent insulating layer on the light sensitive layer, exposing the resulting material and developing the exposed material.
20. The method of claim 19 , wherein the exposing is carried out employing laser.
21. The method of claim 19 , wherein the light sensitive layer is an ablation layer.
22. The method of claim 11 , wherein after the semiconductor layer has been formed, the insulating area is formed on the resulting semiconductor layer.
23. The method of claim 11 , wherein after the semiconductor layer has been formed, an ink receptive layer is provided on the resulting scmiconductor layer, and then the insulating area is formed in the ink receptive layer on the semiconductor layer.
24. The method of claim 11 , wherein after the semiconductor layer has been formed, an intermediate layer is provided on the semiconductor layer so as to protect the resulting semiconductor layer, and then the insulating area is formed on the intermediate layer.
25. The method of claim 11 , wherein the semiconductor layer is an organic semiconductor layer containing an organic semiconductive material.
26. The method of claim 11 , wherein the substrate is a resin sheet comprised of a resin.
27. The method of claim 11 , wherein the scmiconductor layer is formed so as to cross the gate busline.
28. The method of claim 11 , wherein the drain elcetrode forms a pixel electrode or the drain electrode is connected to a pixel electrode, wherein the pixel electrode is separated by the insulating area from the source electrode which is connected to the source busline.
29. The method of claim 11 , wherein the substrate is transported during manufacture.
30. The method of claim 11 wherein the insulating area is linearly formed on the substrate while the substrate is transported in the direction crossing the gate busline to linearly form the insulating area.
31. The method of claim 11 , wherein the thin-film transistor comprises the substrate, the gate electrode, and the gate insulating layer in this order.
32. The method of claim 11 , wherein the thin-film transistor comprises the substrate, the gate electrode, the sate insulating layer, the semiconductor layer, and the insulating layer in this order.