Semiconductor device
View Patent ↗The following steps are carried out: forming a gate electrode on a semiconductor substrate with a gate insulating film interposed therebetween, forming a dummy gate electrode on the semiconductor substrate with a dummy gate insulating film interposed therebetween and forming another dummy gate electrode on the semiconductor substrate with an insulating film for isolation interposed therebetween; forming a metal film on the semiconductor while exposing the gate electrode and covering the dummy gate electrodes; and subjecting the semiconductor substrate to heat treatment and thus siliciding at least an upper part of the gate electrode. Since the gate electrode is silicided and the dummy gate electrodes are non-silicided, this restrains a short circuit from being caused between the gate electrode and adjacent one of the dummy gate electrodes.
1. A semiconductor device comprising:
a semiconductor substrate;
a gate insulating film formed on an active region in the semiconductor substrate;
a gate electrode formed on the gate insulating film and fully silicided;
a dummy gate electrode formed above the semiconductor substrate and made of non-silicided silicon; and
an interlayer dielectric formed on the dummy gate electrode, wherein
the interlayer dielectric is not formed on the gate electrode, and
the dummy gate electrode is unnecessary for actual circuit operation.
2. The semiconductor device of claim 1 , wherein a dummy gate insulating film is formed on the dummy gate electrode, and the interlayer dielectric is formed on the dummy gate electrode with the dummy gate insulating film interposed therebetween.
3. The semiconductor device of claim 1 , wherein the dummy gate electrode is formed on the active region with the dummy gate insulating film interposed therebetween.
4. The semiconductor device of claim 1 further comprising an isolation region formed in the semiconductor substrate, wherein
the dummy gate electrode is formed on the isolation region.
5. The semiconductor device of claim 1 , wherein the interlayer dielectric is made of a silicon oxide film.
6. The semiconductor device of claim 5 further comprising a silicon nitride film formed under the silicon oxide film.
7. The semiconductor device of claim 1 further comprising:
impurity diffusion layers formed in regions of the active region located to both sides of the gate electrode; and
silicide films formed on the impurity diffusion layers.
8. The semiconductor device of claim 1 further comprising:
a first sidewall formed on a side surface of the gate electrode; and
a second sidewall formed on a side surface of the dummy gate electrode.
9. The semiconductor device of claim 8 , wherein the height of an upper surface of the gate electrode is substantially the same as the height of a top portion of the first side wall.
10. The semiconductor device of claim 8 , wherein the first sidewall and the second sidewall are respectively made of a silicon oxide film and a silicon nitride film.
11. The semiconductor device of claim 1 , wherein the gate electrode is silicided with nickel.