Thin film transistor substrate using a horizontal electric field

1. A thin film transistor substrate structure for using a horizontal electric field, comprising:

a substrate;

a gate line and a common line formed on the substrate parallel to each other from a first conductive layer;

a gate insulating film formed on the substrate, the gate line, and the common line;

a data line formed from a second conductive layer on the gate insulating film crossing the gate line and the common line with the gate insulating film therebetween to define a pixel area;

a thin film transistor connected to the gate line and the data line;

a protective film covering the data line and the thin film transistor;

a common electrode formed from a third conductive layer connected to the common line, the common electrode deposed within a hole passing through the protective film and the gate insulating film;

a pixel electrode formed from the second conductive layer, wherein the pixel electrode is extended from a drain electrode of the thin film transistor to define a horizontal electric field between the pixel electrode and the common electrode; and

a gate pad having a lower gate pad electrode formed from the first conductive layer connected to the gate line, and an upper gate pad electrode formed from the third conductive layer connected to the lower gate pad electrode through a first contact hole defined through the protective film and the gate insulating film.

2. The thin film transistor substrate structure according to claim 1 , further comprising a common pad having a lower common pad electrode formed from the first conductive layer connected to the common line, and an upper common pad electrode formed from the third conductive layer connected to the lower common pad electrode through a second contact hole defined through the protective film and the gate insulating film.

3. The thin film transistor substrate structure according to claim 2 , further comprising a data pad having a lower data pad electrode formed from the second conductive layer connected to the data line, and an upper data pad electrode formed from the third conductive layer connected to the lower data pad electrode through a third contact hole defined through the protective film.

4. The thin film transistor substrate structure according to claim 3 , wherein the common electrode, the upper gate pad electrode, the upper common pad electrode, and the upper data pad electrode interface the protective film within respective ones of the hole, the first contact hole, the second contact hole, and the third contact hole.

5. The thin film transistor substrate structure according to claim 1 , further comprising a storage capacitor is defined by a lower storage electrode defined by a portion of the common line, an upper storage electrode connected to the pixel electrode, and a portion of the gate insulating film between the lower storage electrode and the upper storage electrode.

6. The thin film transistor substrate structure according to claim 1 , wherein the common electrode is connected to a portion of the common line through the hole.

7. The thin film transistor substrate structure according to claim 5 , wherein a semiconductor layer included in the thin film transistor overlaps with one of the data line, the lower data pad electrode, and the upper storage electrode.