IP Library Patent Application 11546349
Patent Application
App. No. 11/546,349

Semiconductor device and method for producing the same

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Quick Facts
Patent No.
US None
App. No.
11/546,349
Abstract

A semiconductor device including a lower electrode formed in a groove portion, a capacitor insulating film provided so as to cover the lower electrode, and an upper electrode provided so as to cover a plurality of lower electrodes with the capacitor insulating film, wherein a stress buffering portion, being an opening, is formed in the upper electrode. The opening, being the stress buffering portion, is formed by performing an etching process with a mask formed on the upper electrode.

Claims (18)

1 . A semiconductor device, comprising a capacitor, wherein the capacitor comprises:

a plurality of lower electrodes;

a capacitor insulating film formed on each of the lower electrodes; and

an upper electrode covering the lower electrodes, with the capacitor insulating film being sandwiched therebetween, the upper electrode having an opening being a stress buffering portion.

2 . The semiconductor device of claim 1 , further comprising an insulating film including a plurality of grooves therein, wherein:

each of the lower electrodes covers a surface of each of the grooves; and

the upper electrode covers an upper surface of portions of the insulating film outside the grooves.

3 . The semiconductor device of claim 2 , wherein the stress buffering portion is provided in portions of the upper electrode that cover the outside of the grooves.

4 . The semiconductor device of claim 1 , wherein the capacitor insulating film includes TaO x , and the lower electrode includes TiN.

5 . A method for producing a semiconductor device having a capacitor, comprising:

a step (a) of forming a plurality of lower electrodes;

a step (b) of forming a capacitor insulating film covering each of the lower electrodes;

a step (c) of forming an upper electrode covering the lower electrodes, with the capacitor insulating film being sandwiched therebetween; and

a step (d) of performing an etching process with a mask formed on the upper electrode so as to form an opening to be a stress buffering portion in the upper electrode.

6 . The method for producing a semiconductor device of claim 5 , further comprising, before the step (a), a step of forming a plurality of grooves in an insulating film, wherein:

in the step (a), each of the lower electrodes is formed on a surface of a corresponding one of the grooves; and

in the step (c), the upper electrode is formed to cover an upper surface of portions of the insulating film outside the grooves.

7 . The method for producing a semiconductor device of claim 5 , further comprising, after the step (d), a step of removing the mask

Assignments (2)
CHANGE OF NAME Recorded Nov 24, 2008
From: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
To: PANASONIC CORPORATION
Reel/Frame 021897/0671 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 2, 2007
From: SHIBATA, YOSHIYUKI
To: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
Reel/Frame 019238/0891 →