Granted Patent B2

US 8,483,317 · App. 11/547,819 · Granted Jul 9, 2013

Abstract

Claims (40)

1. A method of controlling sampling frequency and sampling phase of a sampling device from a value generated by an equalizer coupled to the sampling device, the method comprising the steps of:

generating a complex representation of the value developed by the equalizer;

generating a representation of a decision from an output of the equalizer;

performing delay and multiply operations of the decision representation with a conjugate of the complex representation to obtain a sampling error estimate; and

adjusting the sampling frequency and sampling phase of the sampling device using the sampling error estimate; and wherein the sampling device comprises an analog to digital converter followed by a sample rate converter and wherein the step of adjusting includes the step controlling the sample rate converter to determine sampling instants.

2. The method of claim 1 , wherein the equalizer is adapted to receive ATSC compliant signals.

3. The method of claim 1 , wherein the equalizer is adapted to receive ADTB-T compliant signals.

4. The method of claim 1 , wherein the complex representation comprises an in-phase signal and a quadrature signal.

5. The method of claim 1 , wherein the step of generating a representation of a decision is undertaken by a decision device.

6. The method of claim 5 , including the further step of transforming a decision representation into a further complex representation.

7. The method of claim 6 , including the further step of forming a conjugate of the further complex representation.

8. The method of claim 5 , wherein the decision representation comprises an error estimate.

9. The method of claim 5 , wherein the decision device comprises a decision slicer.

10. The method of claim 5 , wherein the decision device comprises a trellis decoder.

11. The method of claim 10 , wherein the trellis decoder utilizes a Viterbi algorithm.

12. The method of claim 1 , wherein the correlating step includes the step of temporally aligning the decision representation and the complex representation of the value developed by the equalizer.

13. The method of claim 1 , wherein the step of generating a representation is undertaken by a pulse shaping filter.

14. The method of claim 13 , wherein the pulse shaping filter is a raised cosine filter.

15. The method of claim 13 , wherein the pulse shaping filter includes only a series of delays and adders.

16. The method of claim 1 , wherein the step of generating a representation is undertaken by a timing offset post filter.

17. The method of claim 1 , wherein the correlating step is undertaken by a multiplier.

18. The method of claim 1 , wherein the sampling device comprises an analog to digital converter having a voltage controlled crystal oscillator (VCXO) and wherein the step of adjusting comprises the step of controlling the VCXO to determine sampling instants.

19. A decision directed control device for controlling sampling frequency and sampling phase of a sampling device from a value generated by an equalizer coupled to the sampling device, comprising:

first circuitry that generates a complex representation of the value developed by the equalizer;

second circuitry that generates a representation of a decision from an output of the equalizer;

third circuitry that performs delay and multiply operations of the decision representation with a conjugate of the complex representation to obtain sampling error estimate; and

fourth circuitry that adjusts the sampling frequency and sampling phase of the sampling device using the sampling error estimate; and wherein the sampling device comprises an analog to digital converter followed by a sample rate converter and wherein the step of adjusting includes the step controlling the sample rate converter to determine sampling instants.

20. The decision directed control device of claim 19 , wherein the complex representation comprises an in-phase signal and a quadrature signal.

21. The decision directed control device of claim 19 , wherein the circuitry that generates a representation of a decision includes a decision device.

22. The decision directed control device of claim 21 , further including fifth circuitry that transforms the decision representation into a further complex representation.

23. The decision directed control device of claim 22 , further including sixth circuitry that forms a conjugate of the further complex representation.

24. A non-transitory computer-readable medium for controlling sampling frequency and sampling phase of a sampling device from a value generated by an equalizer coupled to the sampling device, including programming for implementing:

a first routine for generating a complex representation of the value developed by the equalizer;

a second routine for generating a representation of a decision from an output of the equalizer;

a third routine that performs delay and multiply operations of the decision representation with a conjugate of the complex representation to obtain a sampling error estimate; and

a fourth routine for adjusting the sampling frequency and sampling phase of the sampling device using the sampling error estimate; and wherein the sampling device comprises an analog to digital converter followed by a sample rate converter and wherein the step of adjusting includes the step controlling the sample rate converter to determine sampling instants.

25. The computer-readable medium of claim 24 , wherein the complex representation comprises an in-phase signal and a quadrature signal.

26. The computer-readable medium of claim 24 , wherein the second routine is undertaken by a decision device.

27. The computer-readable medium of claim 26 , including the further routine of transforming the decision representation into a further complex representation.

28. The computer-readable medium of claim 27 , including the further routine of forming a conjugate of the further complex representation.

Assignments (9)