IP Library Granted Patent US 7,677,701
Granted Patent B2
US 7,677,701 · App. 11/551,457 · Granted Mar 16, 2010

Micro-fluid ejection head with embedded chip on non-conventional substrate

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Quick Facts
Patent No.
US 7,677,701
App. No.
11/551,457
Granted
Mar 16, 2010
Kind
B2
Abstract

Micro-fluid ejection heads and methods for fabricating the same. One such micro-fluid ejection head includes a substrate having a plurality of fluid ejection actuator devices adjacent to a device surface thereof A valley is adjacent to the device surface of the substrate. A semiconductor chip is associated with the plurality of fluid ejection actuator devices. The chip is in the valley adjacent the device surface of the substrate. A conductive material is deposited adjacent to the device surface of the substrate. The deposited conductive material generally conforms to the valley. The conductive material is in electrical flow communication with the chip.

Claims (21)

1. A micro-fluid ejection head comprising:

a substrate having a plurality of fluid ejection actuator devices adjacent to a device surface thereof and a valley adjacent to the device surface of the substrate;

a semiconductor chip associated with the plurality of fluid ejection actuator devices, the chip being in the valley adjacent the device surface of the substrate;

a conductor material deposited adjacent to the device surface of the substrate, wherein the deposited conductor material generally conforms to the valley, the conductive material being in electrical flow communication with the chip; and

a glaze layer adjacent to the device surface of the substrate to provide a surface roughness of less than about 7.5 nanometers.

2. The micro-fluid ejection head of claim 1 , further comprising a nozzle plate adjacent to the device surface of the substrate.

3. The micro-fluid ejection head of claim 1 , further comprising a fluid supply slot in the substrate and adjacent to the plurality of fluid ejection actuators, the fluid supply slot providing for flow of fluid from a fluid supply surface of the substrate to the device surface of the substrate, the fluid supply surface being opposite the device surface.

4. The micro-fluid ejection head of claim 1 , wherein the substrate comprises a material selected from the group consisting of glass, ceramic, metal, and plastic.

5. The micro-fluid ejection head of claim 1 , wherein the substrate comprises a large array substrate having a length greater than about 2.5 centimeters.

6. The micro-fluid ejection head of claim 1 , wherein the valley has a depth ranging from about 400 to about 800 microns.

7. The micro-fluid ejection head of claim 1 , wherein the plurality of fluid ejection actuators are located on a peak area of the substrate adjacent the at least one valley.

8. The micro-fluid ejection head of claim 1 , further comprising an encapsulant material substantially filling the at least one valley to substantially planarize the device surface.

9. The micro-fluid ejection head of claim 1 , further comprising a nozzle plate layer adjacent to substantially all of the device surface of the substrate.

10. The micro-fluid ejection head of claim 1 , further comprising a nozzle plate layer adjacent to a peak area of the substrate adjacent the valley.

11. The micro-fluid ejection head of claim 1 , further comprising a plurality of chips associated with the plurality of fluid ejection actuator devices.

12. The micro-fluid ejection head of claim 1 , wherein the valley has a side wall having a slope that provides a connecting trace radius area that is a square root of two times a depth of the valley.

13. A micro-fluid ejection head comprising:

a substrate having a plurality off fluid ejection actuator devices adjacent to a device surface thereof and a valley adjacent to the device surface of the substrate;

a semiconductor chip associated with the plurality of fluid ejection actuator devices, the chip being in the valley adjacent the device surface of the substrate;

a conductor material deposited adjacent to the device surface of the substrate, wherein the deposited conductor material generally conforms to the valley, the conductive material being in electrical flow communication with the chip; and

wherein the valley has a side wall having a slope that provides a connecting trace radius area that is a square root of two tines a depth of the valley.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 14, 2013
From: LEXMARK INTERNATIONAL, INC.; LEXMARK INTERNATIONAL TECHNOLOGY, S.A.
To: FUNAI ELECTRIC CO., LTD
Reel/Frame 030416/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 25, 2006
From: XIAO, ZHIGANG
To: LEXMARK INTERNATIONAL, INC.
Reel/Frame 018436/0897 →