Method for Manufacturing Semiconductor Device
The present invention achieves the enhancement of a manufacturing yield factor and the reduction of manufacturing cost in a manufacturing method of a semiconductor device having a hetero junction bipolar transistor (HBT), a Schottky diode and a resistance element. The present invention is directed to the manufacturing method of a semiconductor device in which respective semiconductor layers which become a sub collector layer, a collector layer, a base layer, a wide gap emitter layer and an emitter layer are sequentially formed over one surface of a semiconductor substrate and, thereafter, respective semiconductor layers are processed to form the hetero junction bipolar transistor, the Schottky diode and the resistance element in a monolithic manner. An emitter electrode of the hetero junction bipolar transistor, a Schottky electrode of the Schottky diode and a resistance film of the resistance element are simultaneously formed using a same material (for example, WSiN). Accordingly, the man-hours can be reduced and the manufacturing cost of the semiconductor device can be reduced.
1 - 41 . (canceled)
42 . A method for manufacturing a semiconductor device having a hetero-junction bipolar transistor (HBT), comprising the steps of:
(a) preparing a substrate having a first semiconductor layer of a first type over the substrate, a second semiconductor layer of a second-type over the first semiconductor layer, an InGaP layer of the first-type over the second semiconductor layer and a third semiconductor layer of the first-type over the InGaP layer, the first type being opposite to the second type;
(b) forming an emitter electrode of the HBT over the third semiconductor layer;
(c) after the step (b), forming the third semiconductor layer into a mesa-shaped emitter layer of the HBT;
(d) after the step (c), forming a base electrode over the second semiconductor layer outside the mesa-shaped emitter layer;
(e) after the step (d), forming an insulation film over the emitter and base electrodes; and
(f) after the step (e), etching the second semiconductor layer and InGap layer to form a mesa-shaped base layer of the hetero-junction bipolar transistor;
(g) forming a collector electrode over the first semiconductor layer.
43 . A method according to claim 42 , wherein each of the first, second and third semiconductor layers contains a GaAs layer.
44 . A method according to claim 42 , wherein the first and second types are n-type and p-type, respectively.
45 . A method according to claim 42 , wherein in the step (f) the insulation film acts as an etching mask.