IP Library Granted Patent US 7,505,287
Granted Patent B1
US 7,505,287 · App. 11/558,326 · Granted Mar 17, 2009

On-time control for constant current mode in a flyback power supply

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Quick Facts
Patent No.
US 7,505,287
App. No.
11/558,326
Granted
Mar 17, 2009
Kind
B1
Abstract

The present invention is a system and a method that controls the current limit such that it is maintained within a small range for any acceptable input voltages, e.g., 90 to 264 Volts RMS, causes the output voltage of a PWM controller to drop as the output load increases so as to maintain a constant current output, and does cycle by cycle calculation compensating for the V IN ripple output from the bridge and bulk filter capacitor so that no loop filter is required in the constant current mode.

Claims (32)

1. A method for limiting an output current of a power supply over multiple switching cycles in a constant current mode using pulse width modulation, said power supply having a primary and secondary side, the method comprising the steps of:

generating a sense voltage signal on the primary side that is proportional to an output voltage signal on the secondary side;

measuring a reset time on the primary side using said sense voltage signal, said reset time representing a duration of a current pulse on the secondary side; and

generating a digital feedback voltage signal used to maintain a substantially constant current on the secondary side, said digital feedback voltage signal representing the on-time for a subsequent switching cycle, wherein a product of said on-time for a subsequent switching cycle and said reset-time for a present switching cycle is a first value, wherein said first value is substantially constant for multiple switching cycles.

2. The method of claim 1 , wherein said step of generating a digital feedback voltage signal comprises two division operations.

3. The method of claim 2 , wherein said step of generating a digital feedback voltage signal comprises the steps of:

dividing a first constant value by an input voltage value to generate a first intermediate value;

diving said first intermediate value by a value proportional to said reset-time for said present switching cycle to generate the digital feedback voltage signal.

4. The method of claim 3 , wherein said input voltage value is a digital representation of an instantaneous level of an input voltage of the power supply.

5. The method of claim 4 , wherein said input voltage value compensates for fluctuations in said input voltage based upon line frequency components.

6. The method of claim 1 , where said step of generating a digital feedback voltage signal uses an input voltage value that is a digital representation of an instantaneous level of an input voltage of the power supply.

7. The method of claim 6 , wherein said input voltage value compensates for fluctuations in said input voltage based upon line frequency components.

8. A power supply control system for limiting an output current of the power supply over multiple switching cycles in a constant current mode using pulse width modulation, said power supply having a primary and secondary side, comprising:

sense voltage means for generating a sense voltage signal on the primary side that is proportional to an output voltage signal on the secondary side;

reset time means for measuring a reset time on the primary side using said sense voltage signal, said reset time representing a duration of a current plus on the secondary side; and

feedback means for generating a digital feedback voltage signal used to maintain a substantially constant current on the secondary side, said digital feedback voltage signal representing the on-time for a subsequent switching cycle, wherein a product of said on-time for a subsequent switching cycle and said reset-time for a present switching cycle is a first value, wherein said first value is substantially constant for multiple switching cycles.

9. The system of claim 8 , wherein said feedback means includes a division means for performing two division operations.

10. The system of claim 9 , wherein said division means divides a first constant value by an input voltage value to generate a first intermediate value, and divides said first intermediate value by a value proportional to said reset-time for said present switching cycle to generate the digital feedback voltage signal.

11. The system of claim 10 , wherein said input voltage value is a digital representation of an instantaneous level of an input voltage of the power supply.

12. The system of claim 11 , wherein said input voltage value compensates for fluctuations in said input voltage based upon line frequency components.

13. The system of claim 8 , where said feedback means utilizes an input voltage value that is a digital representation of an instantaneous level of an input voltage of the power supply.

14. The system of claim 13 , wherein said input voltage value compensates for fluctuations in said input voltage based upon line frequency components.

15. A power supply control system for limiting an output current of the power supply over multiple switching cycles in a constant current mode using pulse width modulation, said power supply having a primary and secondary side, comprising:

a sense voltage device having including a winding on the primary side, to generate a sense voltage on the primary side that is proportional to an output voltage signal on the secondary side;

a counter, to determine a reset time on the primary side using said sense voltage signal, said reset time representing a duration of a current pulse on the secondary side; and

a feedback device, disposed to receive said reset time, to generate a digital feedback voltage signal used to maintain a substantially constant current on the secondary side, said digital feedback voltage signal representing the on-time for a subsequent switching cycle, wherein a product of said on-time for a subsequent switching cycle and said reset-time for a present switching cycle is a first value, wherein said first value is substantially constant for multiple switching cycles.

16. The system of claim 15 , wherein said feedback device includes divisional logic for performing division operations.

17. The system of claim 16 , wherein said division logic divides a first constant value by an input voltage value to generate a first intermediate value, and divides said first intermediate value by a value proportional to said reset-time for said present switching cycle to generate the digital feedback voltage signal.

18. The system of claim 17 , wherein said input voltage value is a digital representation of an instantaneous level of an input voltage of the power supply.

19. The system of claim 18 , wherein said input voltage value compensates for fluctuations in said input voltage based upon line frequency components.

20. The system of claim 15 , where said feedback device utilizes an input voltage value that is a digital representation of an instantaneous level of an input voltage of the power supply.

21. The system of claim 20 , wherein said input voltage value compensates for fluctuations in said input voltage based upon line frequency components.

Assignments (6)
CHANGE OF NAME Recorded Mar 11, 2014
From: DIALOG SEMICONDUCTOR, INC.
To: DIALOG SEMICONDUCTOR INC.
Reel/Frame 032427/0733 →
CHANGE OF NAME Recorded Mar 5, 2014
From: IWATT INC.
To: DIALOG SEMICONDUCTOR, INC.
Reel/Frame 032391/0234 →
RELEASE OF SECURITY INTEREST Recorded Jun 6, 2013
From: SILICON VALLEY BANK
To: IWATT INC.
Reel/Frame 030571/0636 →
MERGER Recorded Mar 29, 2013
From: IWATT INC.
To: IWATT INC.
Reel/Frame 030112/0599 →
SECURITY AGREEMENT Recorded Oct 6, 2009
From: IWATT INC.
To: SILICON VALLEY BANK
Reel/Frame 023330/0187 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 9, 2006
From: KESTERSON, JOHN WILLIAM
To: IWATT INC.
Reel/Frame 018503/0843 →