Apparatus, system, and method for dynamic phase equalization in a communication channel

1. An apparatus for dynamic phase equalization, the apparatus comprising:

a transmitter history module configured to store a plurality of bits from a data stream that is transmitted through a communication channel;

a transmitter detection module configured to detect a pre-transition bit of a first value that is preceded in the data stream by at least one bit of the first value and followed by a transition bit with a second value;

a driver module configured to transmit the data stream by driving the communication channel with a drive signal at a first voltage for a bit time interval in response to a bit with the first value and driving the communication channel with the drive signal at a second voltage for the bit time interval in response to a bit of the second value; and

a transition module configured to pre-drive the communication channel to the second voltage of the transition bit for a pre-drive time interval during the bit time interval of the pre-transition bit, the pre-drive time interval ending concurrently with an end of the bit time interval, wherein the pre-drive time interval is in a range of ten to seventy percent of the bit time interval;

wherein the transmitter history module, the transmitter detection module, the driver module, and the transition module comprise one or more of logic hardware and executable code, the executable code stored on a non-transitory computer readable medium.

2. The apparatus of claim 1 , wherein the pre-drive time interval is in the range of forty to sixty percent of the bit time interval.

3. The apparatus of claim 1 , wherein the transmitter history module comprises a transmitter delay line configured to store the plurality of bits in transmitter cascading registers.

4. The apparatus of claim 3 , wherein the transmitter detection module comprises a transmitter look-up table that detects the pre-transition bit in response to the bits stored in the transmitter history module.

5. The apparatus of claim 4 , wherein the transition module further comprises a multiplexer that selects between the drive signal and a pre-drive signal and the transition module pre-drives the communication channel by generating the pre-drive signal at the second voltage and selecting the pre-drive signal with the multiplexer.

6. The apparatus of claim 1 , wherein the pre-drive time interval varies as a function of a number of bits of the first value that precede the pre-transition bit.

7. A non-transitory computer readable medium embodied a computer program having code executing to perform operations for dynamic phase equalization, the computer program comprising:

storing a plurality of bits from a data stream that is transmitted through a communication channel;

detecting a pre-transition bit of a first value that is preceded in the data stream by at least one bit of the first value and followed by a transition bit with a second value;

transmitting the data stream by driving the communication channel with a drive signal at a first voltage for a bit time interval in response to a bit with the first value and driving the communication channel with the drive signal at a second voltage for the bit time interval in response to a bit of the second value; and

pre-driving the communication channel at the second voltage of the transition bit for a pre-drive time interval during the bit time interval of the pre-transition bit, the pre-drive time interval ending concurrently with an end of the bit time interval, wherein the pre-drive time interval is in a range of ten to seventy percent of the bit time interval.

8. The method of claim 7 , wherein the pre-drive time interval is in the range of forty to sixty percent of the bit time interval.

9. The method of claim 7 , wherein the pre-drive time interval varies as a function of a number of bits of the first value that precede the pre-transition bit.

10. The method of claim 7 , wherein the communication channel is pre-driven by generating a pre-drive signal at the second voltage and selecting the pre-drive signal from a multiplexer with inputs of the drive signal and the pre-drive signal.

11. The method of claim 7 , wherein a look-up table detects the pre-transition bit.

12. A system for dynamic phase equalization, the system comprising:

a communication channel;

a transmitter in electrical communication with the communication channel and comprising

a transmitter history module configured to store a plurality of bits from a data stream that is transmitted through the communication channel;

a transmitter detection module configured to detect a pre-transition bit of a first value that is preceded in a data stream by at least one bit of the first value and followed by a transition bit with a second value;

a driver module configured to transmit the data stream by driving the communication channel with a drive signal at a first voltage for a bit time interval in response to a bit with the first value and driving the communication channel with the drive signal at a second voltage for the bit time interval in response to a bit of the second value;

a transition module configured to pre-drive the communication channel to the second voltage of the transition for a pre-drive time interval during the bit time interval of the pre-transition bit, the pre-drive time interval ending concurrently with an end of the bit time interval, wherein the pre-drive time interval is in a range of ten to seventy percent of the bit time interval; and

a receiver in electrical communication with the communication channel and configured to receive a plurality of received bits of the data stream from the communication channel.

13. The system of claim 12 , wherein the pre-drive time interval is in the range of forty to sixty percent of the bit time interval.

14. The system of claim 12 , wherein the pre-drive time interval varies as a function of a number of bits of the first value that precede the pre-transition bit.

15. The system of claim 12 , wherein the transmitter history module comprises a transmitter delay line configured to store the plurality of bits in transmitter cascading registers.

16. The system of claim 15 , wherein the transmitter detection module comprises a transmitter look-up table that detects the pre-transition bit in response to the bits stored in the transmitter history module.

17. The system of claim 16 , wherein the transition module further comprises a multiplexer that selects between the drive signal and a pre-drive signal and the transition module pre-drives the communication channel by generating the pre-drive signal at the second voltage and selecting the pre-drive signal with the multiplexer.