PWM pattern sequence to reduce losses in voltage source inverters

1. A method for controlling an inverter using sequences of predetermined states, each state uniquely corresponding to a set of control signals provided to the inverter that is coupled to a motor, the method comprising:

repeatedly applying a first center null timing sequence of the states to sequentially provide to the inverter a first predetermined sequence of sets of control signals;

monitoring a zero crossing condition in an electrical current flowing between the inverter and a terminal of the motor; and

changing the repeated application of the first center null timing sequence into a repeated application of a second center null timing sequence of states when the monitoring detects a zero crossing condition, the second center null timing sequence defining a second predetermined sequence of sets of control signals.

2. A method according to claim 1 , wherein:

the first center null timing sequence includes an inactive state in which the corresponding set of control signals causes all terminals of the motor to be connected through the inverter to a first bus; and

the changing selects the second center null timing sequence to be a sequence that includes an inactive state in which the corresponding set of control signals causes all terminals of the motor to be connected through the inverter to a second bus where the second bus is different than the second bus.

3. A method according to claim 1 , further comprising:

computing a dwell time for each state of the first center null timing sequence based on an input command; and

computing a dwell time for each state of the second center null timing sequence based on the input command.

4. A machine-readable medium comprising sets of instructions operable in a controller for controlling an inverter that uses sequences of predetermined states, each state uniquely corresponding to a set of control signals provided to the inverter that is coupled to a motor, the controller comprising a processor, the sets of instructions operable to cause the processor to perform operations comprising:

repeatedly applying a first center null timing sequence of the states to sequentially provide to the inverter a first predetermined sequence of sets of control signals;

monitoring a zero crossing condition in an electrical current flowing between the inverter and a terminal of the motor; and

changing the repeated application of the first center null timing sequence into a repeated application of a second center null timing sequence of states when the monitoring detects a zero crossing condition, the second center null timing sequence defining a second predetermined sequence of sets of control signals.

5. A medium according to claim 4 , wherein:

the first center null timing sequence includes an inactive state in which the corresponding set of control signals causes all terminals of the motor to be connected through the inverter to a first bus; and

the set of instructions operable to cause the processor to perform the changing operation causes the processor to perform the changing operation in such a way as to select the second center null timing sequence to be a sequence that includes an inactive state in which the corresponding set of control signals causes all terminals of the motor to be connected through the inverter to a second bus where the second bus is different than the second bus.

6. A medium according to claim 4 , wherein the sets of instructions are further operable to cause the processor to perform additional operations comprising:

computing a dwell time for each state of the first center null timing sequence based on an input command; and

computing a dwell time for each state of the second center null timing sequence based on the input command.