Semiconductor device and method for manufacturing same
View Patent ↗In a semiconductor device 10 including a structure where transfer electrodes 2 a to 2 c are disposed on a semiconductor substrate 1 via an insulation layer 3 , a first semiconductor region 4 of a first conductivity type, a second semiconductor region 5 of a conductivity type opposite to the first conductivity type, and a third semiconductor region 6 of the first conductivity type in a position that overlaps a region of the semiconductor substrate 1 directly underneath the transfer electrodes 2 a to 2 c . The second semiconductor region 5 is formed on the first semiconductor region 4 . The third semiconductor region 6 is formed on the second semiconductor region 5 so that a position of a maximal point 8 of electric potential of the second semiconductor region 5 when being depleted is deeper than a position of the maximal point 8 in a case where the third semiconductor region 6 does not exist.
1. A solid-state imaging device comprising: a photodiode provided in a semiconductor substrate; and a transfer electrode provided on the semiconductor substrate via an insulation layer, wherein
the semiconductor substrate comprises: a first semiconductor region of a first conductivity type formed with a first impurity; a second semiconductor region of a conductivity type opposite to the first conductivity type; and a third semiconductor region of the first conductivity type in a position that overlaps a region of the semiconductor substrate directly underneath the transfer electrode,
the second semiconductor region is formed on the first semiconductor region as a channel portion that reads out an electric charge generated in the photodiode, and
the third semiconductor region is a p-type region formed on the second semiconductor region, in a vicinity of an interface between the semiconductor substrate and the insulation layer by using a second impurity of at least one material selected from the group consisting of indium, gallium and thallium, each having a larger atomic radius and having a lower speed of diffusion induced by heat in comparison with, those of the first impurity,
wherein the solid-state imaging device has a buried channel-type MOS transistor, and
the second impurity is carried out by ion-implantation, and
an acceleration energy is set in a range between 60 keV and 150 keV, and a dose is set in a range between 1×10 12 ions/cm 2 and 8×10 12 ions/cm 2 , during the ion-implantation.
2. The solid-state imaging device according to claim 1 , wherein the second semiconductor region is a n-type region in which arsenic is introduced.
3. The solid-state imaging device according to claim 1 , wherein the first semiconductor region is formed by using, as the impurity, a material that has a low speed of diffusion induced by heat.
4. The solid-state imaging device according to claim 3 , wherein the first semiconductor region is a p-type region in which indium is introduced.
5. The solid-state imaging device according to claim 1 , further comprising a fourth semiconductor region of a first conductivity type on the surface of the photodiode,
an impurity to be introduced into the fourth semiconductor region has a larger atomic radius and has a lower speed of diffusion induced by heat in comparison with those of the first impurity.
6. A method for manufacturing a solid-state imaging device comprising: a photodiode provided in a semiconductor substrate; and a transfer electrode provided on the semiconductor substrate via an insulation layer,
the method at least comprising:
(a) a step of introducing an impurity of a first conductivity type into a region that overlaps a region on the semiconductor substrate directly underneath the transfer electrode so as to form a first semiconductor region;
(b) a step of introducing an impurity of a conductivity type opposite to the first conductivity type into a region that overlaps a region on the first semiconductor region directly underneath the transfer electrode so as to form a second semiconductor region serving as a channel portion that reads out an electric charge generated in the photodiode; and
(c) a step of introducing an impurity of the first conductivity type into a vicinity of an interface between the semiconductor substrate and the insulation layer in a region that overlaps a region on the second semiconductor region directly underneath the transfer electrode so as to form a third semiconductor region,
wherein the solid-state imaging device has a buried channel-type MOS transistor, and
wherein the step (c) forms a p-type region by introducing at least one of indium, gallium and thallium as the impurity of the first conductivity type which is carried out by ion-implantation, and
an acceleration energy is set in a range between 60 keV and 150 keV, and a dose is set in a range between 1×10 12 ions/cm 2 and 8×10 12 ions/cm 2 , during the ion-implantation.
7. The method for manufacturing a solid-state imaging device according to claim 6 , wherein the impurity of the first conductivity type in the step (c) is at least one of indium, gallium and thallium.
8. The method for manufacturing a solid-state imaging device according to claim 6 , wherein, in the ion-implantation in the step (c), the impurity is ionized into a bivalent ion.
9. The method for manufacturing a solid-state imaging device according to claim 6 , wherein, in the ion-implantation in the step (c), the impurity is ionized into a monovalent ion.
10. The method for manufacturing a solid-state imaging device according to claim 6 , wherein the impurity of the conductivity type opposite to the first conductivity type in the step (b) is arsenic.
11. The method for manufacturing a solid-state imaging device according to claim 6 , further comprising a step of heating the semiconductor substrate after the ion-implantation in the step (c).
12. The method for manufacturing a solid-state imaging device according to claim 6 , further comprising a step (d) of forming a fourth semiconductor region by introducing an impurity of a first conductivity type on the surface of the photodiode,
the impurity of the first conductivity type used in the step (d) has a larger atomic radius and has a lower speed of diffusion induced by heat in comparison with those of the impurity of the first conductivity type used in the step (a).
13. A semiconductor device comprising a MOS transistor provided in a semiconductor substrate, the MOS transistor having a gate electrode provided on the semiconductor substrate via an insulation layer, wherein
the semiconductor substrate comprises: a first semiconductor region of a first conductivity type formed with a first impurity; a second semiconductor region of a conductivity type opposite to the first conductivity type; and a third semiconductor region of the first conductivity type in a position that overlaps a region of the semiconductor substrate directly underneath the gate electrode,
the second semiconductor region is formed on the first semiconductor region as a channel portion in the MOS transistor,
the third semiconductor region is a p-type region formed on the second semiconductor region, in a vicinity of an interface between the semiconductor substrate and the insulation layer by using a second impurity of at least one material selected from the group consisting of indium, gallium and thallium, each having a larger atomic radius and having a lower speed of diffusion induced by heat in comparison with those of the first impurity, and
a semiconductor region serving as a source region of the MOS transistor and a semiconductor region serving as a drain are formed in positions that are adjacent to the second semiconductor region and the third semiconductor region,
wherein the solid-state imaging device has a buried channel-type MOS transistor, and
the second impurity is carried out by ion-implantation, and
an acceleration energy is set in a range between 60 keV and 150 keV, and a dose is set in a range between 1×10 12 ions/cm 2 and 8×10 12 ions/cm 2 , during the ion-implantation.
14. The semiconductor device according to claim 13 , wherein the third semiconductor region is a p-type region in which at least one of indium, gallium and thallium is introduced.
15. The semiconductor device according to claim 13 , wherein the second semiconductor region is a n-type region in which arsenic is introduced.
16. The semiconductor device according to claim 13 , wherein the first semiconductor region is formed by using, as an impurity, a material that has a low speed of diffusion induced by heat.
17. The semiconductor device according to claim 16 , wherein the first semiconductor region is a p-type region in which indium is introduced.
18. The solid-state imaging device according to claim 13 , wherein a maximal point of electric potential of the channel portion exists in the second semiconductor region.