Granted Patent B2

US 7,579,968 · App. 11/572,807 · Granted Aug 25, 2009

Abstract

Claims (33)

1. A data processing circuit, comprising an encoder circuit for encoding an input data word that comprises a plurality of digits wherein each digit has a value selected from at least three available digit values for controlling a signal level in multi-level encoding scheme that uses more than two levels, the encoder circuit being arranged to

define at least two digit maps, each digit map defining assignments of each of the available digit values to a respective output digit value, each digit map mapping to a common set of output digit values;

select at least two groups of digits within the input data word, each group associated with a respective one of the digit maps, the groups being selected under a constraint that each digit map has been applied selectively to the digits from its associated group, digit counts of the number of times respective digit values, which occur in the data word wherein the data word will satisfy predetermined criteria;

generate a data signal that represents the input data word by information that identifies the selected groups and an output data word obtained by mapping the digits of each group in the input data word according to the digit map for that group.

2. A data processing circuit according to claim 1 , comprising a memory with memory cells for storing greater than two- level encoded information, each digit of the output data word being stored in a respective one of the memory cells.

3. A data processing circuit according to claim 2 , comprising

a detector circuit arranged to detect the digit values of the output data word represented by comparing signals from respective ones of the memory cells each with at least two different threshold levels,

a threshold level selection circuit arranged to select the threshold levels so that the criteria are met for the detected digit values for the output data word.

4. A data processing circuit according to claim 1 , wherein said criteria impose that digit counts for individual digit values and/or sums of digit counts for sets of digit values lie within respective predetermined ranges of digit count values that contain at least one digit count value.

5. A data processing circuit according to claim 1 , the encoder circuit being arranged to

define a sequence of the criteria;

select the digit maps in association with the criteria, so that application of the digit map that is associated with a particular criterion does not change whether the criteria associated with groups that precede the particular criterion in the sequence are satisfied;

change the content of successive groups in the sequence successively, each group being changed until, when the digit map associated with the group has been applied selectively to the digits from the group, the digit counts meet the criterion associated with the digit map.

6. A data processing circuit according to claim 5 , wherein the digit maps associated with successive criteria in the sequence each involve exchanging a respective pair of digit values, the remaining digit values remaining unchanged.

7. A data processing circuit according to claim 5 , wherein the sequence of the criteria and/or the digit maps associated with the criteria are selected so that, for each particular criterion in the sequence, after application of the digit maps associated with the preceding criteria in the sequence, there exists at least one digit count for which the particular criterion is satisfied in a range of digit counts from a first digit count before application of the digit map associated with the particular criterion to a second digit count after a hypothetical application of the digit map associated with the particular criterion to all digits in the word.

8. A data processing circuit according to claim 5 wherein the data signal that represents the information that represents the input data word includes information that identifies the digit maps.

9. A data processing circuit according to claim 5 , comprising an output circuit connected to a transmission channel, the output circuit being arranged to transmit the digits of the output data word as greater than two- level encoded information.

10. A method of encoding an input data word that comprises a plurality of digits wherein each digit has a value selected from at least three available digit values for controlling a signal level in a multi- level encoding scheme that uses more than two levels, the method comprising

receiving the input data word;

defining at least two digit maps, each digit map defining assignments of each of the available digit values to a respective different output digit value, each digit map mapping to a common set of outputs digit values;

selecting at least two groups of digits within the input data word, each group associated with a respective one of the digit maps, the groups being selected under a constraint that digit counts of the number of times respective digit values, which occur in the data word wherein in the data word will satisfy predetermined criteria;

generating a data signal that represents the input data word by information that identifies the selected groups and an output data word obtained by mapping the digits of each group in the input data word according to the digit map for that group.

11. A method of encoding according to claim 10 , wherein the criteria impose that digit counts for individual digit values and/or sums of digit counts for sets of digit values lie within respective predetermined ranges that contain at least one value.

12. A method of encoding according to claim 10 , the method comprising

defining a sequence of the criteria;

selecting the digit maps in association with the criteria, so that application of the digit map that is associated with a particular criterion does not change whether the criteria associated with groups that precede the particular criterion in the sequence are satisfied;

changing the content of successive groups in the sequence successively, each group being changed until, when the digit map associated with the group has been applied selectively to the digits from the group, the digit counts meet the criterion associated with the digit map.

13. A method of encoding according to claim 12 , wherein the digit maps associated with successive criteria in the sequence each involve exchanging a respective pair of digit values.

14. A method of encoding according to claim 12 , wherein the sequence of the criteria and/or the digit maps associated with the criteria are selected so that, for each particular criterion in the sequence, after application of the digit maps associated with the preceding criteria in the sequence, there exists at least one digit count for which the particular criterion is satisfied in a range of digit counts from a first digit count before application of the digit map associated with the particular criterion to a second digit count after a hypothetical application of the digit map associated with the particular criterion to all digits in the word.

15. A method of encoding according to claim 10 , wherein the data signal that represents the information that represents the input data word includes information that identifies the digit maps.

16. A method of encoding according to claim 10 , comprising detecting the digit values of the output data word represented by the data signal by comparing the data signal with at least two different threshold levels, the threshold levels being selected so that the criteria are met for the detected digit values.

17. A method of encoding according to claim 10 , wherein the data signal is stored in a memory, the digits of the data word being stored in respective memory cells at a common address, as greater than two- level encoded information.

18. A method of encoding according to claim 10 , wherein the data signal is transmitted via a transmission channel, the digits of the data word being transmitted as greater than two- level encoded information.

Assignments (11)