IP Library Granted Patent US 7,821,273
Granted Patent B2
US 7,821,273 · App. 11/575,307 · Granted Oct 26, 2010

Circuit for detecting the impedance of a load

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Quick Facts
Patent No.
US 7,821,273
App. No.
11/575,307
Granted
Oct 26, 2010
Kind
B2
Abstract

The invention refers to a circuit and a method for detecting the impedance of a load, whereby the circuit and the method can be used by an impedance matching circuit. Impedance matching circuits need a complex algorithm to adjust the impedance accordingly. This algorithm renders the response time to be long. It has been found out that the complexity partially stems from the fact that the phase of the reflection coefficient is not known over the full range of 0° to 360°. A quadrature phase detector is used to provide the full phase information.

Claims (27)

1. A circuit for detecting an impedance or an admittance of a radio frequency or microwave load, comprising:

a directional coupler having input terminals connected to a radio frequency or microwave amplifier and connected to the load;

the directional coupler having a first output terminal connected to a first peak detector for measuring a magnitude of a voltage or a magnitude of a current of a forward wave, wherein the first peak detector comprises a first mixer and a first amplitude limiter, and wherein the forward wave is inputted to a first input port of the mixer, and the forward wave is also inputted to the amplitude limiter, and the output of the amplitude limiter is inputted to a second input port of the mixer;

the directional coupler having an second output terminal connected to a second peak detector for measuring the magnitude of a voltage or a magnitude of a current of a reflected wave, wherein the second peak detector comprises a second mixer and a second amplitude limiter, and wherein the reflected wave is inputted to a first input port of the second mixer, and the reflected wave is also inputted into the second amplitude limiter, and the output of the second amplitude limiter is inputted to a second input port of the second mixer; and

a quadrature phase detector being arranged to output signals providing information on the phase θ of the reflection coefficient Γ within a range of 0° to 360 °.

2. Circuit according to claim 1 , in which the first peak detector and the second peak detector comprise buffer amplifiers.

3. Circuit according to claim 1 , whereby the signals providing information on the phase θ are a signal proportional to sin(θ), and a signal proportional to cos(θ).

4. Circuit according to claim 1 , whereby the quadrature phase detector is an all-pass filter comprising a 90° phase shifter.

5. A method for detecting the impedance or the admittance of a radio frequency or microwave load, the method comprising the following steps:

arranging a directional coupler between a radio frequency (RF) or microwave amplifier and a load;

arranging the output of a forward wave by the RF or microwave amplifier, the forward wave traveling towards the load;

measuring a magnitude of a voltage or a magnitude of a current of the forward wave, wherein the measuring the magnitude of the voltage or the magnitude of the current of the forward wave is performed by peak detection using a first peak detector comprising a mixer and an amplitude limiter, wherein the forward wave is inputted to a first input port of the mixer, and the forward wave is also inputted to the amplitude limiter, and the output of the amplitude limiter is inputted to a second input port of the mixer;

measuring a magnitude of a voltage or a magnitude of a current of a reflected wave, wherein the measuring the magnitude of the voltage or the magnitude of the current of the reflected wave is performed by peak detection using a second peak detector comprising a mixer and an amplitude limiter, wherein the reflected wave is inputted to a first input port of the mixer, and the reflected wave is also inputted into the amplitude limiter, and the output of the amplitude limiter is inputted to a second input port of the mixer; and

measuring the phase θ of the reflection coefficient Γ within a range of 0° to 360°.

6. Method according to claim 5 , whereby measuring the phase θ of the reflection coefficient Γ is done by means of a quadrature phase detector.

7. An impedance matching circuit comprising:

an adjustable output matching network connected to a radio frequency (RF) or microwave amplifier by a feed line, the adjustable output matching network connected to a load by means of the feed line;

a detector for measuring the impedance or an admittance of the load, the detector connected to a node of the feed line, the detector comprising:

a directional coupler having input terminals connected to a radio frequency or microwave amplifier and connected to the load, the directional coupler having output terminals connected to:

a first peak detector for measuring a magnitude of a voltage or a magnitude of a current of a forward wave, wherein the first peak detector comprises a first mixer and a first amplitude limiter, and wherein the forward wave is inputted to a first input port of the mixer, and the forward wave is also inputted into the amplitude limiter, and the output of the amplitude limiter is inputted to a second input port of the mixer; and

a second peak detector for measuring a magnitude of a voltage or a magnitude of a current of a reflected wave, wherein the second peak detector comprises a second mixer and a second amplitude limiter, and wherein the reflected wave is inputted to a first input port of the second mixer, and the reflected wave is also inputted into the second amplitude limiter, and the output of the second amplitude limiter is inputted to a second input port of the second mixer;

a quadrature phase detector being arranged to output signals providing information on the phase θ of the reflection coefficient Γ within a range of 0° to 360 °; and

a unit for controlling the output of the adjustable matching network the control unit being connected to the detector.

8. Impedance matching circuit according to claim 7 , whereby the node is located between the RF amplifier and the adjustable output matching network.

9. Impedance matching circuit according to claim 7 , whereby the node is located between the adjustable output matching network and the load.

10. Impedance matching circuit according to claim 7 , whereby the signals providing information on the phase θ are a signal proportional to sin(θ), and a signal proportional to cos(θ).

11. Impedance matching circuit according to claim 7 , whereby the quadrature phase detector is an all-pass filter comprising a 90° phase shifter.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 13, 2013
From: EPCOS AG
To: QUALCOMM TECHNOLOGIES, INC.
Reel/Frame 031590/0576 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 28, 2010
From: NXP B.V.
To: EPCOS AG
Reel/Frame 023862/0284 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 14, 2008
From: VAN BEZOOIJEN, ADRIANUS; CHANLO, CHRISTOPHE
To: NXP B.V.
Reel/Frame 020361/0303 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 17, 2007
From: KONINKLIJKE PHILIPS ELECTRONICS N.V.
To: NXP B.V.
Reel/Frame 019719/0843 →