Digital signal receiver and method for controlling the same
View Patent ↗A digital signal receiver comprises a signal separating section ( 11 ), a clock signal generating section ( 12 ), a video data processing section ( 14 ), an audio data processing section ( 15 ), and a control section ( 17 ). The clock signal generating section ( 12 ) generates an operation clock signal ( 105 ) for the signal separating section ( 11 ), the video data processing section ( 14 ), and the audio data processing section ( 15 ). The control section ( 17 ) pauses the signal separating section ( 11 ), the video data processing section ( 14 ), and the audio data processing section ( 15 ) until receiving a clock stability signal ( 108 ) indicating that the operation clock signal ( 105 ) is stable, the clock stability signal ( 108 ) being generated by the clock signal generating section ( 12 ).
1. A digital signal receiver comprising:
a signal separating section for separating video data and audio data from a given digital AV signal;
a video data processing section for processing the video data separated by the signal separating section; and
an audio data processing section for processing the audio data separated by the signal separating section,
wherein the digital signal receiver comprises a control section for controlling an operating state of a control subject based on a determination signal indicating whether or not video data and audio data are included in the digital AV signal, where the control subject is at least one of the video data processing section and the audio data processing section, and
the control section pauses the video data processing section and does not pause the audio data processing section when the determination signal indicates that video data is not included and audio data is included in the digital AV signal, and the control section pauses the audio data processing section and does not pause the video data processing section when the determination signal indicates that audio data is not included and video data is included in the digital AV signal.
2. The digital signal receiver of claim 1 , wherein the control section pauses the control subject by interrupting supply of power to the control subject.
3. The digital signal receiver of claim 1 , comprising:
a clock signal generating section for generating, from a given first clock signal, a second clock signal for operating the control subject,
wherein the control section pauses the control subject by interrupting supply of the second clock signal to the control subject.
4. The digital signal receiver of claim 1 , wherein the control section pauses the control subject by asserting a reset signal with respect to the control subject.
5. A method for controlling a digital signal receiver, wherein the digital signal receiver comprises:
a signal separating section for separating video data and audio data from a given digital AV signal;
a video data processing section for processing the video data separated by the signal separating section; and
an audio data processing section for processing the audio data separated by the signal separating section,
wherein the video data processing section is paused and the audio data processing section is not paused when a determination signal indicating whether or not video data and audio data are included in the digital AV signal, indicates that video data is not included and audio data is included in the digital AV signal, and the audio data processing section is paused and the video data processing section is not paused when the determination signal indicates that audio data is not included and video data is included in the digital AV signal.