IP Library Granted Patent US 7,834,933
Granted Patent B2
US 7,834,933 · App. 11/581,114 · Granted Nov 16, 2010

Vertical sync signal generator

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Quick Facts
Patent No.
US 7,834,933
App. No.
11/581,114
Granted
Nov 16, 2010
Kind
B2
Abstract

When a vertical sync pulse detection circuit mistakenly detects a vertical sync pulse in an inputted video signal, a sync stability detection circuit detects whether a detection signal of the vertical sync pulse detection circuit and a timing signal generated from a count value of a first frame cycle counter are in accordance, and the accordance confirmation detection result becomes one of discordance. When this occurs, the count value of the first frame cycle counter is not loaded to a second frame cycle counter so, due to the operation of the second frame cycle counter, a timing generating decoder circuit and a vertical sync signal generating circuit, a vertical sync signal at the previously detected normal phase can be generated.

Claims (16)

1. A vertical sync signal generator comprising:

a vertical sync pulse detection circuit that detects a vertical sync pulse from an inputted video signal and outputs a detection signal;

a first count circuit that counts a frame cycle of the vertical sync pulse from the detection signal and outputs a first count result;

a first timing generating decoder circuit that decodes the first count result and generates a first timing signal for when the vertical sync pulse should be detected next;

an accordance/discordance detection circuit that detects whether the detection signal and the first timing signal are in accordance and outputs a detection result of accordance/discordance;

a second count circuit that, when the detection result is of accordance, loads the first count value and counts a frame cycle of the vertical sync pulse from the first count value with the loaded first count value acting as the initial value and outputs a second count value, and when the detection result is one of discordance, does not load the first count value and outputs the previously counted count value as the second count value;

a second timing generating decoder circuit that decodes the second count result and generates a second timing signal for generation of a vertical sync signal; and

a vertical sync signal generating circuit that uses the second timing signal and generates the vertical sync signal.

2. The vertical sync signal generator of claim 1 , further comprising:

a gate circuit that seeks the logical sum of the detection signal and the first timing signal;

a switching circuit that inputs the second timing signal and the outputted signal of the gate circuit and which can switch the output with a selection signal, and, when in a TV weak electric field mode, outputs the second timing signal, imparts it to the vertical sync signal generating circuit and makes it generate the vertical sync signal and when not in a TV weak electric field mode, outputs the output signal of the gate circuit, imparts it to the vertical sync signal generating circuit and makes it generate the vertical sync signal.

3. The vertical sync signal generator of claim 1 , further comprising:

a gate circuit that seeks the logical sum of the detection signal and the first timing signal;

a noise detection circuit that detects whether there is noise in the vertical sync pulse period in the inputted video signal and outputs a noise detection result; and

a switching circuit that inputs the second timing signal and the outputted signal of the gate circuit and which can switch the output with the noise detection result, and, when the noise detection result is that there is noise, outputs the second timing signal, imparts it to the vertical sync signal generating circuit and makes it generate the vertical sync signal and when the noise detection result is that there is no noise, outputs the output signal of the gate circuit, imparts it to the vertical sync signal generating circuit and makes it generate the vertical sync signal.

4. The vertical sync signal generator of claim 3 , wherein the noise detection circuit uses an integral circuit for the vertical sync pulse detection circuit and detects whether there is noise in the vertical sync pulse period from the generated detection period signal and the detection signal outputted from the vertical sync pulse detection circuit.

Assignments (3)
CHANGE OF NAME Recorded Mar 21, 2014
From: OKI SEMICONDUCTOR CO., LTD
To: LAPIS SEMICONDUCTOR CO., LTD.
Reel/Frame 032495/0483 →
CHANGE OF NAME Recorded Jan 16, 2009
From: OKI ELECTRIC INDUSTRY CO., LTD.
To: OKI SEMICONDUCTOR CO., LTD.
Reel/Frame 022162/0586 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 16, 2006
From: AKIYAMA, TAKAAKI; YAMAMOTO, TOYOAKI
To: OKI ELECTRIC INDUSTRY CO., LTD.
Reel/Frame 018530/0468 →