Nonvolatile memory device with write error suppressed in reading data
View Patent ↗A data write current from a pinned layer to a free layer is larger than a data write current from the free layer to the pinned layer. A data read current is smaller in value than the data write current. In the case where a difference in data read current between a high-resistance state and a low-resistance state is relatively small, a sense amplifier is connected so that the data read current flows from the pinned layer to the free layer, namely from a source line to a bit line.
1. A nonvolatile memory device, comprising:
a plurality of memory cells arranged in rows and columns; and
a plurality of first and second current lines provided correspondingly to memory cell columns respectively for supplying a current via a selected memory cell in data read operation or data write operation,
said memory cells each including a magneto-resistance element provided between corresponding first and second current lines for executing magnetic nonvolatile data storage,
said magneto-resistance element including
a fixed magnetization layer electrically coupled with said corresponding first current line and magnetized in a first magnetization direction,
a free magnetization layer electrically coupled with said corresponding second current line, and magnetized in one of said first magnetization direction and a second magnetization direction opposite to said first magnetization direction, based on spin-polarized electrons depending on a direction in which a data write current flows via said corresponding first and second current lines in said data write operation, and
a barrier layer of a non-magnetic material provided between said fixed magnetization layer and said free magnetization layer, and
said nonvolatile memory device further comprising a data read circuit supplying, in said data read operation, to the first and second current lines corresponding to said selected memory cell, a data read current in a direction in which disturb is unlikely to occur.
2. The nonvolatile memory device according to claim 1 , wherein
in a case where a first data write current is supplied via said selected memory cell from the corresponding first current line to the corresponding second current line in said data write operation, the magneto-resistance element of said selected memory cell has a first resistance value and, in a case where a second data write current smaller than said first data write current is supplied via said selected memory cell from said corresponding second current line to said corresponding first current line, the magneto-resistance element of said selected memory cell has a second resistance value smaller than said first resistance value, and
said data read circuit supplies said data read current in said direction in which disturb is unlikely to occur, based on a relation between a resistance ratio between the first resistance value and the second resistance value of said magneto-resistance element and a current ratio between said first data write current and said second data write current.
3. The nonvolatile memory device according to claim 2 , wherein
said data read circuit includes a sense amplifier generating read data based on a comparison between a reference current and the data read current depending on said first resistance value and said second resistance value.
4. The nonvolatile memory device according to claim 3 , further comprising a dummy resistance element electrically coupled between said corresponding first and second current lines in parallel with said selected memory cell in said data read operation.
5. The nonvolatile memory device according to claim 1 , further comprising a plurality of word lines provided correspondingly to memory cell rows respectively, wherein
said memory cells each include a switch connected via said magneto-resistance element between said corresponding first and second current lines, and
said switch corresponds to a p-type MOS channel transistor having its gate electrically coupled with a corresponding word line.
6. The nonvolatile memory device according to claim 5 , wherein
a selected word line of said plurality of word lines is set to a first potential level causing said p-type MOS channel transistor to be turned on, and
a non-selected word line of said plurality of word lines is set to a second potential level higher than said first potential level, causing said p-type MOS channel transistor to be turned off.
7. The nonvolatile memory device according to claim 1 , wherein
said plurality of first and second current lines are disposed in parallel in the same direction.
8. The nonvolatile memory device according to claim 1 , wherein
one of the first and second current lines corresponding to said selected memory cell in said data write operation or said data read operation is electrically coupled with a fixed potential, and the other of said corresponding first and second current lines is electrically coupled with a potential higher or lower than said fixed potential.
9. The nonvolatile memory device according to claim 1 , further comprising first and second current line drivers provided correspondingly to said corresponding first and second current lines for supplying said data write current to said selected memory cell in said data write operation,
at least one of said first and second current line drivers includes first and second driver units for controlling one end and the other end of a corresponding current line so that the one end and the other end of the current line are at first and second potential levels, and
said first and second driver units control potential levels of the one end and the other end of said corresponding current line so that an assist magnetic field is applied that causes the free magnetization layer of said selected memory cell to be magnetized in one of said first and second magnetization directions by said data write current flowing through said corresponding current line in said data write operation.
10. A nonvolatile memory device, comprising:
a plurality of memory cells arranged in rows and columns; and
a plurality of first and second current lines provided correspondingly to memory cell columns respectively for supplying a current via a selected memory cell in data read operation or data write operation,
said memory cells each including a magneto-resistance element provided between corresponding first and second current lines for executing magnetic nonvolatile data storage,
said magneto-resistance element including
a fixed magnetization layer electrically coupled with said corresponding first current line and magnetized in a first magnetization direction,
a free magnetization layer electrically coupled with said corresponding second current line, and magnetized in one of said first magnetization direction and a second magnetization direction opposite to said first magnetization direction, based on spin-polarized electrons depending on a direction in which a data write current flows via said corresponding first and second current lines in said data write operation, and
a barrier layer of a non-magnetic material provided between said fixed magnetization layer and said free magnetization layer, and
said nonvolatile memory device further comprising a data read circuit supplying, in said data read operation, to the first and second current lines corresponding to said selected memory cell, a data read current in the same direction as a direction that causes the free magnetization layer of said magneto-resistance element to be magnetized in said second magnetization direction in said data write operation.