IP Library Granted Patent US 7,352,585
Granted Patent B2
US 7,352,585 · App. 11/583,316 · Granted Apr 1, 2008

Flip chip heat sink package and method

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Quick Facts
Patent No.
US 7,352,585
App. No.
11/583,316
Granted
Apr 1, 2008
Kind
B2
Abstract

An electronic package having enhanced heat dissipation is provided exhibiting dual conductive heat paths in opposing directions. The package includes a substrate having electrical conductors thereon and a flip chip mounted to the substrate. The flip chip has a first surface, solder bumps on the first surface, and a second surface oppositely disposed from the first surface. The flip chip is mounted to the substrate such that the solder bumps are registered with the conductors on the substrate. The package further includes a stamped metal heat sink in heat transfer relationship with the second surface of the flip chip. The heat sink includes a cavity formed adjacent to the flip chip containing a thermally conductive material.

Claims (23)

1. A method for conducting heat from a flip chip, the method comprising the steps of:

securing a substrate to a thermally conductive case, the substrate having a plurality of thermally conductive vias passing therethrough, the plurality of thermally conductive vias providing a thermal path from one side of the substrate to another side of the substrate;

mounting a flip chip to the substrate, the flip chip having a first surface, solder bumps on the first surface, and a second surface oppositely disposed from the first surface, the flip chip being mounted to the substrate such that the solder bumps are registered with the plurality of thermally conductive vias; and

attaching a heat sink in heat transfer relationship to the second surface of the flip chip, wherein the heat sink has a cavity formed in a region adjacent to the flip chip and the heat sink forming a cover for the thermally conductive case, the thermally conductive case providing a first thermal conductive path from the flip chip via the plurality of thermally conductive vias and the heat sink providing a second thermal conductive path from the flip chip via the cavity.

2. The method as defined in claim 1 further comprising the step of disposing a thermally conductive material within the cavity of the heat sink.

3. The method as defined in claim 1 further comprising the step of forming the heat sink by stamping sheet metal to form the cavity.

4. The method as defined in claim 1 wherein the thermally conductive case further comprises a plurality of cooling fins.

5. The method as defined in claim 1 , wherein the step of attaching further comprises adhering a surface of the heat sink to the second surface of the flip chip.

6. The method as defined in claim 1 further comprising the step of placing a thermally conductive lubricant between the second surface of the flip chip and the heat sink.

7. The method as in claim 4 , wherein the thermally conductive case is formed from a die cast metal.

8. The method as in claim 7 , wherein the die cast metal is an aluminum alloy.

9. The method as in claim 1 , wherein the solder bumps are surrounded by an electrically non-conductive underfill material.

10. The method as in claim 1 , wherein the solder bumps are surrounded by an electrically non-conductive underfill material and the first surface of the flip chip is spaced away from the substrate.

11. A method for providing at least two discrete thermal conductive paths for a plurality of semi-conductor devices of an electronic package, the method comprising:

securing a substrate of the electronic package to a thermally conductive case having a plurality of cooling fins and a peripheral wall, the peripheral wall defining a perimeter of an area receiving the substrate, the substrate having a plurality of thermally conductive vias passing therethrough, the plurality of thermally conductive vias providing a thermal path from one side of the substrate to another side of the substrate;

mounting the plurality of semi-conductor devices to the substrate, each of the plurality of semi-conductor devices having a first surface, a plurality of solder bumps on the first surface, and a second surface oppositely disposed from the first surface, each of the plurality of semi-conductor devices being mounted to the substrate such that the plurality solder bumps are registered with a respective group of the plurality of thermally conductive vias;

attaching a heat sink cover to the thermally conductive case, the heat cover having a plurality of cavities each being in heat transfer relationship with respect to the second surface of a respective one of the plurality of semi-conductor devices, the thermally conductive case providing a first thermal conductive path for each of the plurality of semi-conductor device via the plurality of thermally conductive vias and the heat sink cover providing a second thermal conductive path for each of the plurality of semi-conductor devices via a respective one of the plurality of cavities; and

filling each of the plurality of cavities with a thermally conductive material.

12. The method as in claim 11 , wherein the thermally conductive case is formed from a die cast metal.

13. The method as in claim 12 , wherein the die cast metal is an aluminum alloy.

14. The method as in claim 11 , wherein each of the plurality of semi-conductor devices are secured to the substrate by an electrically non-conductive underfill material, the electrically non-conductive underfill material surrounding each of the plurality of solder bumps.

15. The method as in claim 11 , wherein the cover fits within the area defined by the peripheral wall of the thermally conductive case.

16. The method as in claim 11 , wherein each of the plurality of solder bumps are surrounded by an electrically non-conductive underfill material and the first surface of each of the plurality of semi-conductor devices is spaced away from the substrate.

Assignments (6)
CHANGE OF NAME Recorded Sep 18, 2024
From: DELPHI TECHNOLOGIES IP LIMITED
To: BORGWARNER US TECHNOLOGIES LLC
Reel/Frame 068985/0968 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 23, 2018
From: DELPHI TECHNOLOGIES, INC
To: DELPHI TECHNOLOGIES IP LIMITED
Reel/Frame 045113/0958 →
RELEASE OF SECURITY INTEREST Recorded Jan 14, 2015
From: JPMORGAN CHASE BANK, N.A.
To: DELPHI TECHNOLOGIES, INC.
Reel/Frame 034762/0540 →
SECURITY AGREEMENT Recorded Apr 18, 2011
From: DELPHI TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 026146/0173 →
RELEASE OF SECURITY INTEREST Recorded Apr 15, 2011
From: THE BANK OF NEW YORK MELLON
To: DELPHI CONNECTION SYSTEMS HOLDINGS LLC; DELPHI PROPERTIES MANAGEMENT LLC; DELPHI TECHNOLOGIES, INC.; DELPHI AUTOMOTIVE SYSTEMS LLC; DELPHI CONNECTION SYSTEMS LLC; DELPHI CORPORATION; DELPHI HOLDINGS LLC; DELPHI INTERNATIONAL SERVICES COMPANY LLC; DELPHI MEDICAL SYSTEMS LLC; DELPHI TRADE MANAGEMENT LLC
Reel/Frame 026138/0574 →
SECURITY AGREEMENT Recorded Nov 13, 2009
From: DELPHI TECHNOLOGIES, INC.
To: BANK OF NEW YORK MELLON, AS ADMINISTRATIVE AGENT, THE
Reel/Frame 023510/0562 →