System and method for DRAM bank assignment

1. A network storage system, comprising:

an address adjusting module comprising a segmented packet receiver module, the segmented packet receiver module configured to receive M sections of a segmented packet, wherein M is an integer greater than one, and wherein a first of the M sections of the segmented packet includes a first bank identification (ID); and

a bank ID overwriter module configured to overwrite the first bank ID of the first of the M sections of the segmented packet with a first control bank ID that is different than the first bank ID, wherein the first of the M sections of the segmented packet is stored in a memory bank corresponding to the first control bank ID.

2. The network storage system of claim 1 , wherein the first control bank ID comprises a starting bank ID.

3. The network storage system of claim 1 , wherein the address adjusting module is configured to randomly generate the first control bank ID.

4. The network storage system of claim 1 , wherein the bank ID overwriter module is configured to overwrite a second bank ID included in a second of the M sections with a second control bank ID.

5. The network storage system of claim 1 , further comprising a packet processor configured to segment the packet.

6. A network device comprising the network storage system of claim 5 .

7. The network device of claim 6 , wherein the network device comprises at least one of a router, a client station, a switch, a gateway, an access point (AP), a bridge, and a concentrator.

8. The network storage system of claim 5 , wherein the address adjusting module is integrated with the packet processor.

9. The network storage system of claim 1 , further comprising memory comprising N banks each having a bank ID, where N is an integer greater than one, wherein the memory is configured to store the first of the M sections based on the first control bank ID.

10. The network storage system of claim 9 , wherein the memory comprises a reduced latency dynamic random access memory (RL-DRAM).

11. The network storage system of claim 9 , wherein the address adjusting module is configured to:

generate the first control bank ID by storing a last bank accessed during a previous access operation to the memory for a previous packet that is different than the segmented packet; and

select one of the N banks that is adjacent to the last bank accessed.

12. The network storage system of claim 11 , wherein a write operation to the bank adjacent to the last bank accessed is modulus by N.

13. The network storage system of claim 9 , wherein the address adjusting module is configured to write the M sections to the N banks cyclically starting at the first control bank ID.

14. The network storage system of claim 9 , further comprising a packet processor module,

wherein following the N banks that receive the M sections of the segmented packet based on the first control bank ID, the packet processor module is configured to reassemble the packet for transmission through a network.

15. The network storage system of claim 9 , wherein the address adjusting module is configured to analyze the memory as a plurality of lines, each line comprising N blocks, wherein a length of each of the N blocks corresponds to a capacity of a burst of one of the N banks.

16. A network storage method, comprising:

receiving M sections of a segmented packet in a segmented packet receiver module of an address adjusting module, wherein M is an integer greater than one, and wherein a first of the M sections of the segmented packet includes a first bank identification (ID);

overwriting the first bank ID of the first of the M sections of the segmented packet with a first control bank ID that is different than the first bank ID; and

storing the first of the M sections in a memory bank corresponding to the first control bank ID.

17. The network storage method of claim 16 , wherein the first control bank ID comprises a starting bank ID.

18. The network storage method of claim 16 , further comprising randomly generating the first control bank ID.

19. The network storage method of claim 16 , further comprising overwriting a second bank ID with a second control bank ID for a second of the M sections that includes the second bank ID.

20. The network storage method of claim 16 , further comprising segmenting the packet.

21. The network storage method of claim 20 , further comprising integrating the address adjusting module with a packet processor module.

22. The network storage method of claim 16 , further comprising storing the first of the M sections based on the first control bank ID in memory comprising N banks each having a bank ID, where N is an integer greater than one.

23. The network storage method of claim 22 , wherein the memory comprises a reduced latency dynamic random access memory (RL-DRAM).

24. The network storage method of claim 22 , further comprising generating the first control bank ID by storing a last bank accessed and selecting a bank adjacent to the last bank accessed.

25. The network storage method of claim 24 , further comprising writing to the adjacent bank, modulus by N.

26. The network storage method of claim 24 , further comprising reassembling the packet for transmission through a network following the N banks receiving the M sections based on the first control bank ID.

27. The network storage method of claim 24 , further comprising analyzing the memory as a plurality of lines, each line comprising N blocks, wherein a length of each of the N blocks corresponds to a capacity of a burst of one of the N banks.

28. The network storage method of claim 22 , further comprising writing the M sections to the N banks cyclically starting at the first control bank ID.