Offset determination arrangement, offset compensation arrangement, synchronization clock generator, method for determination of an offset and modulation method

1. An offset determination arrangement, comprising:

a comparator device configured to compare an input signal with a reference value;

a synchronization unit configured to forward a comparison result of the comparator device as a function of a synchronization signal;

a synchronization clock generator configured to generate the synchronization signal based upon a reference clock signal, wherein the synchronization signal comprises clock pulses and wherein at least one subsequent clock period is shorter than a precedent clock period; and

an approximation unit configured to generate a compensation signal corresponding to an offset of the input signal as a function of the forwarded comparison result.

2. The offset determination arrangement of claim 1 , wherein the synchronization clock generator is configured to generate the synchronization signal as a function of a reference clock signal.

3. The offset determination arrangement of claim 1 , wherein the synchronization clock generator is configured to generate the synchronization signal with a predetermined number of clock pulses or clock periods.

4. The offset determination arrangement of claim 1 , wherein the synchronization clock generator is configured to generate the synchronization signal with each of a second and further clock periods being shorter than a precedent clock period.

5. The offset determination arrangement of claim 1 , wherein the synchronization clock generator and the approximation unit each comprise a control input configured to receive a control signal corresponding to a beginning of an offset determination.

6. The offset determination arrangement of claim 1 , wherein the approximation unit is configured to generate the compensation signal using a method of successive approximation.

7. The offset determination arrangement of claim 1 , wherein the synchronization clock generator comprises:

a control unit configured to generate a counter signal comprising a counter value;

a memory unit configured to receive the counter signal and to determine a delay time corresponding to the counter value, wherein at least one delay time corresponding to one of the counter values is shorter than a delay time corresponding to a respective precedent counter value; and

a programmable counter configured to count a number of clock pulses and to output a clock pulse in the synchronization signal when the number of clock pulses equal to the delay time.

8. An offset compensation arrangement, comprising:

a signal input;

a summation element with a first input coupled to the signal input, a second input coupled to an output of a feedback path, and an output;

a forward path coupled to the output of the summation element, and comprising a digital-analog-converter;

a signal output coupled to an output of the forward path; and

the feedback path coupled to the output of the forward path, and comprising an offset determination arrangement configured to generate a compensation signal at the output of the feedback path corresponding to an offset of an input signal at the output of the forward path, wherein the offset determination arrangement uses a method of successive approximation over a plurality of approximation steps respectively comprising a clock pulse of a synchronization signal that is based upon a reference clock signal, wherein at least one period between the approximation steps is shorter than a precedent period between the approximation steps.

9. The offset compensation arrangement of claim 8 , further comprising a switching element coupled between the signal input and the first input of the summation element, wherein the switching element is controlled by the offset determination arrangement.

10. The offset compensation arrangement of claim 8 , wherein the forward path further comprises a low-pass filter coupled between an output of the digital-analog-converter and the signal output.

11. The offset compensation arrangement of claim 8 , wherein the offset determination arrangement is configured to use a method of successive approximation in which each of a second and further periods between approximation steps is shorter than a precedent period between approximation steps.

12. The offset compensation arrangement of claim 8 , wherein the offset determination arrangement comprises:

a comparator device configured to compare the input signal with a reference value;

a synchronization unit configured to forward a comparison result of the comparator device as a function of clock pulses of a synchronization signal;

an approximation unit configured to generate the compensation signal as a function of the forwarded comparison result; and

a synchronization clock generator configured to generate the synchronization signal, wherein at least one clock period between adjacent clock pulses is shorter than a precedent clock period.

13. The offset compensation arrangement of claim 12 , wherein the synchronization clock generator is configured to generate the synchronization signal as a function of a reference clock signal.

14. The offset compensation arrangement of claim 12 , wherein the synchronization clock generator is configured to generate the synchronization signal for a predetermined number of approximation steps.

15. The offset compensation arrangement of claim 12 , wherein the synchronization clock generator and the approximation unit each comprise a control input configured to receive a control signal corresponding to a beginning of an offset determination.

16. A modulation method, performed in a modulation arrangement having an amplitude path with an offset compensation arrangement which comprises a summation element coupled to an output of a feedback path, a forward path which on its input side is coupled to an output of the summation element, and the feedback path which on its input side is coupled to an output of the forward path and comprises an offset determination arrangement to generate a compensation signal corresponding to an offset of an input signal at the output of the forward path, wherein the offset determination arrangement uses a method of successive approximation in which at least one period between approximation steps is shorter than a precedent period between approximation steps, the modulation method comprising:

generating the compensation signal with the offset determination arrangement, wherein the compensation signal is approximated over a plurality of approximation steps respectively comprising a clock pulse of a synchronization signal that is based upon a reference clock signal;

providing an amplitude word;

adding the compensation signal to the amplitude word;

performing a digital-analog conversion of the addition result; and

frequency mixing the digital-analog converted signal with a carrier signal.

17. The modulation method of claim 16 , wherein the carrier signal comprises a phase modulated carrier signal.