Synchronization circuit for synchronizing PWM modulators
View Patent ↗A synchronization circuit for synchronizing at least two self-oscillating PWM modulators, each outputting a respective pulse-width-modulated output signal comprising signal pulses with signal pulse centers, shifts the timings of the signal pulses relative to one another such that their signal pulse centers are in sync.
1. A synchronization circuit for synchronizing at least two self-oscillating PWM modulators, each outputting a respective pulse-width-modulated output signal comprising signal pulses with signal pulse centers; said synchronizing circuit shifting the timings of said signal pulses relative to one another such that said signal pulse centers are in sync; wherein each of said self-oscillating PWM modulators comprises:
a signal input for receiving an analogue input signal;
an input signal filter producing a filtered difference signal by filtering a difference signal between said analogue input signal and a feedback signal;
a comparator for generating a comparator output signal by comparing said filtered difference signal with a reference voltage;
a delay circuit for generating a delayed comparator output signal by delaying said comparator output signal on the basis of a synchronization control signal;
a power stage amplifying for generating an amplified comparator output signal by amplifying said delayed comparator output signal;
a feedback filter for generating a feedback signal for said input signal filter by filtering said amplified comparator output signal; and
a signal output outputting said amplified comparator output signal as said respective pulse-width-modulated output signals of the relevant of said PWM modulators.
2. The synchronization circuit of claim 1 , comprising:
a first input for receiving a first pulse-width-modulated output signal generated by a first of said self-oscillating PWM modulators;
a second input for receiving a second pulse-width-modulated output signal generated by a second of said self-oscillating PWM modulators;
a first output for outputting a first synchronization control signal for said delay circuit of said first self-oscillating PWM modulator; and
a second output for outputting a second synchronization control signal for said delay circuit of said second self-oscillating PWM modulator.
3. The synchronization circuit of claim 1 , comprising:
a first phase detector for detecting a phase difference between rising signal edges in said pulse-width-modulated output signals;
a second phase detector for detecting a negative phase difference between falling signal edges in said pulse-width-modulated output signals;
an adder generating an addition signal by adding said phase differences detecting by said phase detectors; and
an integrator generating said synchronization control signals for actuating said delay circuits of said self-oscillating PWM modulators by integrating said addition signal.
4. The synchronization circuit of claim 1 , shifting said timings of said pulse-width-modulated output signals relative to one another such that a difference signal between said pulse-width-modulated output signals comprises no frequency components in a frequency range of a switching frequency of said self-oscillating PWM modulators.
5. The synchronization circuit of claim 2 , wherein said analogue input signal for said second PWM modulator is the inverse of said analogue input signal for said first PWM modulator.
6. The synchronization circuit of claim 1 , wherein said analogue input signal is an xDSL signal.
7. The synchronization circuit of claim 1 , wherein said analogue input signal is an audio signal.
8. The synchronization circuit of claim 1 , wherein said pulse-width-modulated output signals whose timings have been shifted relative to one another are filtered by a downstream OOB filter.
9. The synchronization circuit of claim 8 , wherein said signal filtered by said OOB filter is output to a two-wire telephone line.
10. A method for synchronizing at least two self-oscillating pulse-width-modulated signals, comprising:
for each of at least two self-oscillating pulse-width-modulated signals:
receiving an analogue input signal,
producing a filtered difference signal by filtering a difference signal between said analogue input signal and a feedback signal,
generating a comparator output signal by comparing said filtered difference signal with a reference voltage,
generating a delayed comparator output signal by delaying said comparator output signal on the basis of a synchronization control signal,
generating an amplified comparator output signal by amplifying said delayed comparator output signal.
generating a feedback signal for producing said filtered difference signal by filtering said amplified comparator output signal, and
outputting said amplified comparator output signal as one of said at least two pulse-width-modulated signals; and
shifting timings of signal pulses of said at least two pulse-width-modulated signals relative to one another such that signal pulse centers of said signal pulses are in sync with one another.