IP Library Granted Patent US 7,957,544
Granted Patent B2
US 7,957,544 · App. 11/593,650 · Granted Jun 7, 2011

Audio signal output control device that suppresses pop sound

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Quick Facts
Patent No.
US 7,957,544
App. No.
11/593,650
Granted
Jun 7, 2011
Kind
B2
Abstract

The potential of a smoothing capacitor for a speaker is smoothly changed by controlling the potential with use of a PWM signal and switching between outputting the PWM signal and an actual audio signal, thereby suppressing a pop sound. The scale of circuitry is reduced and cost is lowered by implementing a PWM circuit in a one-chip microcontroller. Noise is eliminated by outputting a pulse that has been divided in the PWM signal generation stage.

Claims (20)

1. A control apparatus for playing back audio by outputting an audio signal to a speaker, the control apparatus comprising:

a generation unit configured to, before output of the audio signal, generate a pulse signal composed of a plurality of pulses, and output the generated pulse signal to a smoothing capacitor for the speaker; and

a switch unit configured to switch between the audio signal and the pulse signal, wherein a duty ratio of each of the pulses is smaller the earlier the pulse exists on a time axis, and is larger the later the pulse exists on the time axis,

wherein the generation unit includes:

a counter configured to perform count processing according to a reference clock of the control apparatus, and

a PWM circuit configured to generate each of the pulses by modulating a width of the pulse in accordance with a digital value output by the counter,

said control apparatus further comprising:

a dividing unit configured to divide the digital value in each count cycle of the counter into a plurality of values, and output each of the values obtained by the dividing to the PWM circuit,

wherein each of the pulses in the pulse signal has a duty ratio in accordance with a different one of the values obtained by the dividing in the count cycle of the counter.

2. The control apparatus of claim 1 , wherein when the digital value cannot be evenly divided by a predetermined number, the dividing unit unevenly divides the digital value and selectively outputs values obtained by the uneven division to the PWM circuit.

3. The control apparatus of claim 2 , wherein when at least a value m and a value n, being mutually different values, are obtained by the uneven division, the dividing unit adjusts a timing according to which each of the values m and n is output to the PWM circuit.

4. An integrated circuit for playing back audio by outputting an audio signal to a speaker, the integrated circuit comprising:

a generation unit configured to, before output of the audio signal, generate a pulse signal composed of a plurality of pulses, and output the generated pulse signal to a smoothing capacitor for the speaker; and

a switch unit configured to switch between the audio signal and the pulse signal, wherein a duty ratio of each of the pulses is smaller the earlier the pulse exists on a time axis, and is larger the later the pulse exists on the time axis,

wherein the generation unit includes:

a counter configured to perform count processing according to a reference clock of the integrated circuit, and

a PWM circuit configured to generate each of the pulses by modulating a width of the pulse in accordance with a digital value output by the counter,

said integrated circuit further comprising:

a dividing unit configured to divide the digital value in each count cycle of the counter into a plurality of values, and output each of the values obtained by the dividing to the PWM circuit,

wherein each of the pulses in the pulse signal has a duty ratio in accordance with a different one of the values obtained by the dividing in the count cycle of the counter.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 27, 2020
From: PANASONIC CORPORATION
To: PANASONIC SEMICONDUCTOR SOLUTIONS CO., LTD.
Reel/Frame 052755/0917 →
CHANGE OF NAME Recorded Nov 24, 2008
From: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
To: PANASONIC CORPORATION
Reel/Frame 021897/0689 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 11, 2007
From: ADACHI, KAZUKI; SUGIOKA, TETSURO; KIMURA, KIYOMI
To: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
Reel/Frame 018748/0704 →