Erasures assisted block code decoder and related method
View Patent ↗An erasures assisted block code decoder and related method are provided. The erasures assisted block code decoder includes a first block decoder, an erasures processor, and a second block code decoder. The first block decoder, for example, a Reed-Solomon decoder, is configured to decode blocks of data elements, e.g., bytes, that were previously affected by bursty errors. The first block decoder is also configured to identify those of such blocks it is unable to decode. The erasures processor is configured to identify, as erasures, data elements in the un-decodable blocks by utilizing, in the erasures identification process, data elements in the decoded blocks that were corrected by the first block decoder. The second block decoder, e.g., the same or different Reed-Solomon decoder, is configured to decode one or more of the un-decodable blocks by utilizing, in the decoding, the erasures identified by the erasures processor.
1. A concatenated code decoder comprising:
an inner decoder for decoding encoded bits and having a tendency to introduce bursty errors;
a de-interleaver for de-interleaving the decoded bits output from the inner decoder to produce blocks of data; and
an erasures assisted block code decoder for decoding the blocks of data output by the de-interleaver, the erasures assisted block code decoder comprising:
a first block decoder for decoding blocks of data elements, and for identifying blocks that are un-decodable by the first block decoder;
an interleaver for interleaving the blocks output by the first block decoder, thereby spreading any data elements in un-decodable blocks;
an erasures processor for identifying, as erasures, data elements in the un-decodable blocks that are likely erroneous, the identification occurring by utilizing data in the decoded blocks that was corrected during decoding by said first block decoder;
a de-interleaver for de-interleaving blocks of data output by the erasures processor; and
a second block decoder for decoding one or more of the un-decodable blocks of data by utilizing in the decoding one or more of the erasures identified by the erasures processor.
2. The concatenated code decoder of claim 1 wherein the first and second block decoders are the same physical decoder utilized at different times.
3. The concatenated code decoder of claim 1 wherein the first and second block decoders are physically distinct decoders.
4. A concatenated code decoder comprising:
a Viterbi decoder for decoding convolutionally encoded bits and having a tendency to introduce bursty errors;
a de-interleaver for de-interleaving the decoded bits output from the Viterbi decoder to produce blocks of data; and
an erasures assisted block code decoder for decoding the blocks of data output by the de-interleaver, the erasures assisted block code decoder comprising:
a first Reed-Solomon block decoder for decoding blocks of data elements, and for identifying blocks that are un-decodable by the first block decoder;
an interleaver for interleaving the decoded blocks output by the first block decoder, thereby spreading data elements in any un-decodable blocks;
an erasures processor for identifying, as erasures, data elements in the un-decodable blocks by utilizing data in the decoded blocks that was corrected during decoding by said first block decoder;
a de-interleaver for de-interleaving blocks of data output by the erasures processor; and
a second Reed-Solomon block decoder for decoding one or more of the un-decodable blocks of data by utilizing in the decoding one or more of the erasures identified by the erasures processor.
5. The concatenated code decoder of claim 4 wherein the first and second Reed-Solomon block decoders are the same physical decoder utilized at different times.
6. The concatenated code decoder of claim 4 wherein the first and second Reed-Solomon block decoders are physically distinct decoders.